ATMEGA128A-MU Atmel, ATMEGA128A-MU Datasheet - Page 148

MCU 8BIT 128K ISP FLASH 64-QFN

ATMEGA128A-MU

Manufacturer Part Number
ATMEGA128A-MU
Description
MCU 8BIT 128K ISP FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4KB
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
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ATMEGA128A-MU
Manufacturer:
Atmel
Quantity:
442
Part Number:
ATMEGA128A-MU
Manufacturer:
ATMEL
Quantity:
423
Part Number:
ATMEGA128A-MU
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Quantity:
203
17. 8-bit Timer/Counter2 with PWM
17.1
17.2
8151H–AVR–02/11
Features
Overview
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. A simplified
block diagram of the 8-bit Timer/Counter is shown in
I/O pins, refer to
and I/O pins, are shown in bold. The device-specific I/O register and bit locations are listed in the
“Register Description” on page
Figure 17-1. 8-Bit Timer/Counter Block Diagram
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2 and OCF2)
“Pin Configurations” on page
Timer/Counter
TCNTn
OCRn
=
direction
BOTTOM
count
clear
159.
= 0
Control Logic
TCCRn
=
TOP
0xFF
2. CPU accessible I/O registers, including I/O bits
clk
Figure
Tn
Generation
Waveform
17-1. For the actual placement of
( From Prescaler )
Clock Select
Detector
Edge
ATmega128A
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn
148

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