AT32UC3A1512-AUR Atmel, AT32UC3A1512-AUR Datasheet - Page 618
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AT32UC3A1512-AUR
Manufacturer Part Number
AT32UC3A1512-AUR
Description
MCU 32BIT 512KB FLASH 100-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A1512-AUR
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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• OVERFI: Overflow Interrupt Flag
Set by hardware when the current Pipe has received more data than the maximum length of the current Pipe. An interrupt
is triggered if the OVERFIE bit is set. Shall be cleared by software (by setting the OVERFIC bit).
• RXSTALLDI: Received STALLed Interrupt Flag
For all endpoints but isochronous. Set by hardware when a STALL handshake has been received on the current bank of
the Pipe. The Pipe is automatically frozen. This triggers an interrupt if the RXSTALLE bit is set. Shall be cleared to hand-
shake the interrupt (by setting the RXSTALLDIC bit).
• CRCERRI: CRC Error Interrupt Flag
For isochronous endpoint, set by hardware when a CRC error occurs on the current bank of the Pipe. This triggers an inter-
rupt if the TXSTPE bit is set. Shall be cleared to handshake the interrupt (by setting the CRCERRIC bit).
• SHORTPACKETI: Short Packet Interrupt Flag
Set by hardware when a short packet is received by the host controller (packet length inferior to the PSIZE programmed
field). Shall be cleared to handshake the interrupt (by setting the SHORTPACKETIC bit).
• DTSEQ: Data Toggle Sequence
Set by hardware to indicate the data PID of the current bank.
For OUT pipe, this field indicates the data toggle of the next packet that will be sent.
For IN pipe, this field indicates the data toggle of the received packet stored in the current bank.
• NBUSYBK: Number of Busy Banks
Set by hardware to indicate the number of busy bank.
For OUT Pipe, it indicates the number of busy bank(s), filled by the user, ready for OUT transfer. When all banks are busy,
this triggers an PXINT interrupt if UPCONX.NBUSYBKE = 1.
For IN Pipe, it indicates the number of busy bank(s) filled by IN transaction from the Device. When all banks are free, this
triggers an PXINT interrupt if UPCONX.NBUSYBKE = 1..
32058J–AVR32–04/11
0
0
1
1
0
0
1
1
NBUSYBK
DTSEQ
0
1
0
1
0
1
0
1
Data toggle sequence
Data0
Data1
reserved
reserved
Number of busy bank
All banks are free.
1 busy bank
2 busy banks
reserved
AT32UC3A
618
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