AT32UC3A1512-AUR Atmel, AT32UC3A1512-AUR Datasheet - Page 60
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AT32UC3A1512-AUR
Manufacturer Part Number
AT32UC3A1512-AUR
Description
MCU 32BIT 512KB FLASH 100-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A1512-AUR
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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13.5.7
13.5.7.1
13.5.7.2
Table 13-1.
32058J–AVR32–04/11
Index
0
1
2
3
4
5
Sleep modes
Sleep Mode
Idle
Frozen
Standby
Stop
DeepStop
Static
Entering and exiting sleep modes
Supported sleep modes
Sleep modes
In normal operation, all clock domains are active, allowing software execution and peripheral
operation. When the CPU is idle, it is possible to switch off the CPU clock and optionally other
clock domains to save power. This is activated by the sleep instruction, which takes the sleep
mode index number as argument.
The sleep instruction will halt the CPU and all modules belonging to the stopped clock domains.
The modules will be halted regardless of the bit settings of the mask registers.
Oscillators and PLLs can also be switched off to save power. Some of these modules have a rel-
atively long start-up time, and are only switched off when very low power consumption is
required.
The CPU and affected modules are restarted when the sleep mode is exited. This occurs when
an interrupt triggers. Note that even if an interrupt is enabled in sleep mode, it may not trigger if
the source module is not clocked.
The following sleep modes are supported. These are detailed in
•Idle: The CPU is stopped, the rest of the chip is operating. Wake-up sources are any interrupt.
•Frozen: The CPU and HSB modules are stopped, peripherals are operating. Wake-up sources
are any interrupt from PB modules.
•Standby: All synchronous clocks are stopped, but oscillators and PLLs are running, allowing
quick wake-up to normal mode. Wake-up sources are RTC or external interrupt (EIC).
•Stop: As Standby, but Oscillator 0 and 1, and the PLLs are stopped. 32 KHz (if enabled) and
RC oscillators and RTC/WDT still operate. Wake-up sources are RTC, external interrupt (EIC),
or external reset pin.
•DeepStop: All synchronous clocks, Oscillator 0 and 1 and PLL 0 and 1 are stopped. 32 KHz
oscillator can run if enabled. RC oscillator still operates. Bandgap voltage reference and BOD is
turned off. Wake-up sources are RTC, external interrupt (EIC) or external reset pin.
•Static: All oscillators, including 32 KHz and RC oscillator are stopped. Bandgap voltage refer-
ence BOD detector is turned off. Wake-up sources are external interrupt (EIC) in asynchronous
mode only or external reset pin.
CPU
Stop
Stop
Stop
Stop
Stop
Stop
HSB
Run
Stop
Stop
Stop
Stop
Stop
PBA,B
GCLK
Run
Run
Stop
Stop
Stop
Stop
Osc0,1
PLL0,1
Run
Run
Run
Stop
Stop
Stop
Osc32
Run
Run
Run
Run
Run
Stop
RCOsc
Run
Run
Run
Run
Run
Stop
Table
BOD &
Bandgap
On
On
On
On
Off
Off
13-1.
AT32UC3A
Full power
Full power
Low power
Low power
Low power
Voltage
Regulator
Full power
60
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