AT32UC3B0512-A2UT Atmel, AT32UC3B0512-A2UT Datasheet - Page 380

• Manufacturer Part Number: AT32UC3B0512-A2UT
• Description: IC MCU AVR32 512K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-A2UT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Controller Family/series: AT32UC3B
• No. Of I/o's: 44
• Ram Memory Size: 96KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.7.2.6
32059K–03/2011
Address setup
Figure 22-14. Endpoint Activation Algorithm
As long as the endpoint is not correctly configured (CFGOK is zero), the controller does not
acknowledge the packets sent by the host to this endpoint.
The CFGOK bit is set only if the configured size and number of banks are correct compared to
their maximal allowed values for the endpoint (see
FIFO size (i.e. the DPRAM size).
See
The USB device address is set up according to the USB protocol.
Once the USB device address is configured, the controller filters the packets to only accept
those targeting the address stored in UADD.
UADD and ADDEN shall not be written all at once.
UADD and ADDEN are cleared:
When UADD or ADDEN is cleared, the default device address 0 is used.
• After all kinds of resets, the USB device address is 0.
• The host starts a SETUP transaction with a SET_ADDRESS(addr) request.
• The user write this address to the USB Address (UADD) field in UDCON, and write a zero to
• The user sends a zero-length IN packet from the control endpoint.
• The user enables the recorded USB device address by writing a one to ADDEN.
• On a hardware reset.
• When the USBB is disabled (USBE written to zero).
• When a USB reset is detected.
the Address Enable (ADDEN) bit in UDCON, so the actual address is still 0.
Section 22.7.1.6
Yes
EPENn = 1
CFGOK ==
Activation
UECFGn
Activated
Endpoint
Endpoint
EPTYPE
EPSIZE
ALLOC
EPDIR
EPBK
1?
for more details about DPRAM management.
No
ERROR
Enable the endpoint.
Test if the endpoint configuration is correct.
Configure the endpoint:
Allocate the configured DPRAM banks.
Table 22-1 on page
- type
- direction
- size
- number of banks
362) and to the maximal
AT32UC3B
380