AT32UC3B0512-A2UT Atmel, AT32UC3B0512-A2UT Datasheet - Page 178
![IC MCU AVR32 512K FLASH 64TQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT32UC3B0512-A2UT
Manufacturer Part Number
AT32UC3B0512-A2UT
Description
IC MCU AVR32 512K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B0512-A2UT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Controller Family/series
AT32UC3B
No. Of I/o's
44
Ram Memory Size
96KB
Cpu Speed
60MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3B0512-A2UT
Manufacturer:
MURATA
Quantity:
11 450
Part Number:
AT32UC3B0512-A2UT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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17.6.1
32059K–03/2011
Access Types
Table 17-1.
1)
uration section at the end of this chapter.
2)
Each configuration register can be accessed in four different ways. The first address location
can be used to write the register directly. This address can also be used to read the register
value. The following addresses facilitate three different types of write access to the register. Per-
forming a “set” access, all bits written to one will be set. Bits written to zero will be unchanged by
the operation. Performing a “clear” access, all bits written to one will be cleared. Bits written to
zero will be unchanged by the operation. Finally, a toggle access will toggle the value of all bits
written to one. Again all bits written to zero remain unchanged. Note that for some registers (e.g.
IFR), not all access methods are permitted.
Note that for ports with less than 32 bits, the corresponding control registers will have unused
bits. This is also the case for features that are not implemented for a specific pin. Writing to an
unused bit will have no effect. Reading unused bits will always return 0.
Offset
0xBC
0xCC
0xDC
0xB4
0xB8
0xC0
0xC4
0xC8
0xD0
0xD4
0xD8
The reset value for these registers are device specific. Please refer to the Module Config-
The reset value is undefined depending on the pin states.
Glitch Filter Enable Register
Glitch Filter Enable Register
Glitch Filter Enable Register
Glitch Filter Enable Register
Interrupt Mode Register 1
Interrupt Mode Register 1
Interrupt Mode Register 1
Interrupt Flag Register
Interrupt Flag Register
Interrupt Flag Register
Interrupt Flag Register
GPIO Register Memory Map
Register
Read/Write
Function
Toggle
Toggle
Clear
Clear
Read
Clear
Set
Set
-
-
GFERS
GFERC
GFERT
IMR1S
IMR1C
IMR1T
GFER
Name
IFRC
IFR
-
-
Read/Write
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Write-Only
Read-Only
Write-Only
Access
-
-
AT32UC3B
Reset value
(1)
(1)
178
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