AT32UC3B064-Z2UR Atmel, AT32UC3B064-Z2UR Datasheet - Page 61
AT32UC3B064-Z2UR
Manufacturer Part Number
AT32UC3B064-Z2UR
Description
MCU AVR32 64K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B064-Z2UR
Package / Case
64-QFN
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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9.6.10
Name:
Access Type:
Offset:
Reset Value:
•
•
•
•
•
•
•
•
32059J–12/2010
BODDET: Brown out detection
OSC32RDY: 32 KHz oscillator Ready
OSC1RDY: Oscillator 1 Ready
OSC0RDY: Oscillator 0 Ready
MSKRDY: Mask Ready
CKRDY: Clock Ready
LOCK1: PLL1 locked
LOCK0: PLL0 locked
OSC0RDY
31
23
15
7
-
-
-
Set to 1 when 0 to 1 transition on POSCSR:BODDET bit is detected:
Set to 1 when 0 to 1 transition on the POSCSR:OSC32RDY bit is detected:
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected:
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected:
Set to 1 when 0 to 1 transition on the POSCSR:MSKRDY bit is detected:
0: The CKSEL register has been written, and the new clock setting is not yet effective.
1: The synchronous clocks have frequencies as indicated in the CKSEL register.
Note: Writing ICR:CKRDY to 1 has no effect.
Set to 1 when 0 to 1 transition on the POSCSR:LOCK1 bit is detected:
Set to 1 when 0 to 1 transition on the POSCSR:LOCK0 bit is detected:
BOD reference value.
used as clock source.
clock source.
clock source.
(CPU/HSB/PBA/PBB)_MASK registers.
source.
source.
Interrupt Status Register
MSKRDY
30
22
14
6
ISR
Read-only
0x04C
0x00000000
-
-
-
CKRDY
29
21
13
5
-
-
-
28
20
12
4
-
-
-
-
27
19
11
3
-
-
-
-
BOD has detected that power supply is going below
PLL 1 is locked and ready to be selected as clock
PLL 0 is locked and ready to be selected as clock
Clocks are now masked according to the
Oscillator 1 is stable and ready to be used as
Oscillator 1 is stable and ready to be used as
The 32 KHz oscillator is stable and ready to be
26
18
10
2
-
-
-
-
OSC32RDY
LOCK1
25
17
9
1
-
-
AT32UC3B
OSC1RDY
BODDET
LOCK0
24
16
8
0
-
61
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