AT32UC3B064-Z2UR Atmel, AT32UC3B064-Z2UR Datasheet - Page 199
AT32UC3B064-Z2UR
Manufacturer Part Number
AT32UC3B064-Z2UR
Description
MCU AVR32 64K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B064-Z2UR
Package / Case
64-QFN
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Figure 18-3. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
Figure 18-4. SPI Transfer Format (NCPHA = 0, 8 bits per transfer)
32059J–12/2010
SPCK cycle (for reference)
SPCK cycle (for reference)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
(to slave)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
SPCK
SPCK
MOSI
MISO
(to slave)
NSS
SPCK
SPCK
MOSI
MISO
NSS
the NCPHA bit. These two parameters determine the edges of the clock signal on which data is
driven and sampled. Each of the two parameters has two possible states, resulting in four possi-
ble combinations that are incompatible with one another. Thus, a master/slave pair must use the
same parameter pair values to communicate. If multiple slaves are used and fixed in different
configurations, the master must reconfigure itself each time it needs to communicate with a dif-
ferent slave.
Table 18-2
Table 18-2.
Figure 18-3 on page 199
***
1
MSB
MSB
MSB
1
shows the four modes and corresponding parameter settings.
MSB
*** Not Defined, but normaly MSB of previous character received
SPI modes
2
6
6
2
SPI Mode
6
6
3
0
1
2
3
5
5
and
3
5
5
Figure 18-4 on page 199
4
4
4
4
4
4
5
3
3
5
3
3
6
2
2
6
2
2
show examples of data transfers.
7
1
1
CPOL
7
0
0
1
1
1
1
8
LSB
8
LSB
LSB
LSB
AT32UC3B
***
NCPHA
1
0
1
0
199
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