AT32UC3B064-Z2UR Atmel, AT32UC3B064-Z2UR Datasheet - Page 246
![MCU AVR32 64K FLASH 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT32UC3B064-Z2UR
Manufacturer Part Number
AT32UC3B064-Z2UR
Description
MCU AVR32 64K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B064-Z2UR
Package / Case
64-QFN
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 246 of 680
- Download datasheet (10Mb)
Notes:
19.13.8
Figure 19-31. Read Write Flowchart in Slave Mode
32059J–12/2010
1. In this case, if THR has not been written at the end of the read command, the clock is automatically stretched before the
2. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
Read Write Flowcharts
ACK.
SADR + MSDIS + SVEN
Set the SLAVE mode:
Read Status Register
EOSACC = 1 ?
TXCOMP = 1 ?
SVACC = 1 ?
END
The flowchart shown in
in Slave mode. A polling or interrupt method can be used to check the status bits. The interrupt
method requires that the interrupt enable register (IER) be configured first.
GACC = 1 ?
Figure 19-31 on page 246
programming sequence
Read TWI_RHR
SVREAD = 0 ?
RXRDY= 0 ?
Decoding of the
Change SADR
Prog seq
OK ?
gives an example of read and write operations
GENERAL CALL TREATMENT
Write in TWI_THR
TXRDY= 1 ?
AT32UC3B
246
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