AT32UC3B064-Z2UR Atmel, AT32UC3B064-Z2UR Datasheet - Page 331
![MCU AVR32 64K FLASH 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT32UC3B064-Z2UR
Manufacturer Part Number
AT32UC3B064-Z2UR
Description
MCU AVR32 64K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B064-Z2UR
Package / Case
64-QFN
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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21.6.6
32059J–12/2010
RS485 Mode
The USART features the RS485 mode to enable line driver control. While operating in RS485
mode, the USART behaves as though in asynchronous or synchronous mode and configuration
of all the parameters is possible. The difference is that the RTS pin is driven high when the
transmitter is operating. The behavior of the RTS pin is controlled by the TXEMPTY bit. A typical
connection of the USART to a RS485 bus is shown in
Figure 21-35. Typical Connection to a RS485 Bus
The USART is set in RS485 mode by programming the MODE field in the Mode Register (MR)
to the value 0x1.
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high
when a timeguard is programmed so that the line can remain driven after the last character com-
pletion.
when the timeguard is enabled.
Figure 21-36. Example of RTS Drive with Timeguard
Figure 21-36
Baud Rate
TXEMPTY
TXRDY
Clock
Write
THR
TXD
RTS
gives an example of the RTS waveform during a character transmission
USART
Start
Bit
RXD
TXD
RTS
D0
D1
D2
D3
D4
D5
D6
Figure
D7
Parity
Bit
21-35.
Stop
Bit
Differential
Bus
TG = 4
AT32UC3B
331
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