ATTINY44-15MZ Atmel, ATTINY44-15MZ Datasheet - Page 38

• Manufacturer Part Number: ATTINY44-15MZ
• Description: MCU AVR 4K FLASH 15MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY44-15MZ

• Package / Case: 20-QFN Exposed Pad
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.9
8.9.1
38
Register Description
Atmel ATtiny24/44/84 [Preliminary]
MCUCR – MCU Control Register
The MCU Control Register contains control bits for power management.
• Bit 7 – BODS: BOD Sleep
In order to disable BOD during sleep (see
to logic one. This is controlled by a timed sequence and the enable bit, BODSE in MCUCR.
First, both BODS and BODSE must be set to one. Second, within four clock cycles, BODS
must be set to one and BODSE must be set to zero. The BODS bit is active three clock cycles
after it is set. A sleep instruction must be executed while BODS is active in order to turn off the
BOD for the actual sleep mode. The BODS bit is automatically cleared after three clock cycles.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logical one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the pro-
grammer's purpose, it is recommended to set the sleep enable (SE) bit just before the
execution of the SLEEP instruction and to clear it immediately after waking up.
• Bits 4, 3 – SM1..0: Sleep Mode Select Bits 2..0
These bits select between the three available sleep modes as shown in
Table 8-2.
Note:
• Bit 2 – BODSE: BOD Sleep Enable
The BODSE bit enables setting of BODS control bit, as explained on BODS bit description.
BOD disable is controlled by a timed sequence.
Bit
Read/Write
Initial Value
SM1
1. Only recommended with external crystal or resonator selected as clock source
0
0
1
1
Sleep Mode Select
BODS
R/W
7
0
PUD
R/W
SM0
6
0
0
1
0
1
R/W
SE
5
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Standby
Table 8-1 on page
SM1
R/W
4
0
(1)
SM0
R/W
3
0
BODSE
R/W
34) the BODS bit must be written
2
0
ISC01
R/W
1
0
Table 8-2 on page
ISC00
R/W
0
0
7701E–AVR–02/11
MCUCR
38.