ATTINY44-15MZ Atmel, ATTINY44-15MZ Datasheet - Page 36

• Manufacturer Part Number: ATTINY44-15MZ
• Description: MCU AVR 4K FLASH 15MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY44-15MZ

• Package / Case: 20-QFN Exposed Pad
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.7
8.8
8.8.1
8.8.2
36
Power Reduction Register
Minimizing Power Consumption
Atmel ATtiny24/44/84 [Preliminary]
Analog-to-Digital Converter
Analog Comparator
When the BOD has been disabled, the wake-up time from sleep mode will be approximately
60µs to ensure that the BOD is working correctly before the MCU continues executing code.
BOD disable is controlled by the BODS (BOD Sleep) bit of MCU Control Register, see
8.9.1 “MCUCR – MCU Control Register” on page
Power-Down and Stand-By, while writing a zero keeps the BOD active. The default setting is
zero, i.e. BOD active.
Writing to the BODS bit is controlled by a timed sequence and an enable bit, see
“MCUCR – MCU Control Register” on page
The Power Reduction Register (PRR), see
provides a method to stop the clock to individual peripherals to reduce power consumption.
The current state of the peripheral is frozen and the I/O registers cannot be read or written.
Resources used by the peripheral when stopping the clock will remain occupied; hence the
peripheral should in most cases be disabled before stopping the clock. Waking up a module,
which is done by clearing the bit in PRR, puts the module in the same state as before
shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. See
sleep modes, the clock is already stopped.
There are several issues to consider when trying to minimize the power consumption in an
AVR
the sleep mode should be selected so that as few of the device's functions as possible are
operating. All functions not needed should be disabled. In particular, the following modules
may need special consideration when trying to achieve the lowest possible power
consumption.
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. See
details on ADC operation.
When entering idle mode, the analog comparator should be disabled if not used. When enter-
ing ADC noise reduction mode, the analog comparator should be disabled. In the other sleep
modes, the analog comparator is automatically disabled. However, if the analog comparator is
set up to use the internal voltage reference as input, the analog comparator should be dis-
abled in all sleep modes. Otherwise, the internal voltage reference will be enabled,
independent of sleep mode. See
figure the Analog Comparator.
®
-controlled system. In general, sleep modes should be used as much as possible, and
“Power-down Supply Current” on page 194
“Analog Comparator” on page 134
38.
“PRR – Power Reduction Register” on page
“Analog-to-Digital Converter” on page 137
38. Writing this bit to one turns off BOD in
for details on how to con-
for examples. In all other
7701E–AVR–02/11
Section 8.9.1
Section
39,
for