ATTINY24A-SSUR Atmel, ATTINY24A-SSUR Datasheet - Page 128

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ATTINY24A-SSUR

Manufacturer Part Number
ATTINY24A-SSUR
Description
MCU AVR 2KB FLASH 20MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY24A-SSUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
14SOIC W
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
12
Interface Type
SPI/USI
On-chip Adc
8-chx10-bit
Number Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY24A-SSUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
15. Analog Comparator
15.1
128
Analog Comparator Multiplexed Input
ATtiny24A/44A/84A
The analog comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator Output, ACO, is set. The comparator can trigger a separate inter-
rupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on comparator
output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is shown
in
Figure 15-1.
Notes:
See
The ADC Power Reduction bit, PRADC, must be disabled in order to use the ADC input multi-
plexer. This is done by clearing the PRADC bit in the Power Reduction Register, PRR. See
“PRR – Power Reduction Register” on page 37
When the Analog to Digital Converter (ADC) is configurated as single ended input channel, it is
possible to select any of the ADC[7:0] pins to replace the negative input to the Analog Compara-
tor. The ADC multiplexer is used to select this input, and consequently, the ADC must be
switched off to utilize this feature. If the Analog Comparator Multiplexer Enable bit (ACME in
ADCSRB) is set and the ADC is switched off (ADEN in ADCSRA is zero), MUX[1:0] in ADMUX
select the input pin to replace the negative input to the analog comparator, as shown in
Figure
ADC MULTIPLEXER
Figure 1-1 on page 2
REFERENCE
ACME
ADEN
OUTPUT
BANDGAP
1. See
15-1.
(1)
ACBG
Table 15-1 on page
Analog Comparator Block Diagram
and
Table 10-9 on page 66
129.
for more details.
for Analog Comparator pin placement.
ACIC
8183C–AVR–03/11
To T/C1 Capture
Trigger MUX
Table

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