ATTINY24A-SSUR Atmel, ATTINY24A-SSUR Datasheet - Page 103

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ATTINY24A-SSUR

Manufacturer Part Number
ATTINY24A-SSUR
Description
MCU AVR 2KB FLASH 20MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY24A-SSUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
14SOIC W
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
12
Interface Type
SPI/USI
On-chip Adc
8-chx10-bit
Number Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY24A-SSUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
12.10 Accessing 16-bit Registers
8183C–AVR–03/11
Figure 12-13. Timer/Counter Timing Diagram, with Prescaler (f
The TCNT1, OCR1A/B, and ICR1 are 16-bit registers that can be accessed by the AVR CPU via
the 8-bit data bus. The 16-bit register must be byte accessed using two read or write operations.
Each 16-bit timer has a single 8-bit register for temporary storing of the high byte of the 16-bit
access. The same temporary register is shared between all 16-bit registers within each 16-bit
timer. Accessing the low byte triggers the 16-bit read or write operation. When the low byte of a
16-bit register is written by the CPU, the high byte stored in the temporary register, and the low
byte written are both copied into the 16-bit register in the same clock cycle. When the low byte of
a 16-bit register is read by the CPU, the high byte of the 16-bit register is copied into the tempo-
rary register in the same clock cycle as the low byte is read.
Not all 16-bit accesses uses the temporary register for the high byte. Reading the OCR1A/B 16-
bit registers does not involve using the temporary register.
To do a 16-bit write, the high byte must be written before the low byte. For a 16-bit read, the low
byte must be read before the high byte.
The following code examples show how to access the 16-bit timer registers assuming that no
interrupts updates the temporary register. The same principle can be used directly for accessing
the OCR1A/B and ICR1 Registers. Note that when using “C”, the compiler handles the 16-bit
access.
and ICF n
(PC and PFC PWM)
TOVn
(CTC and FPWM)
(Update at TOP)
TCNTn
TCNTn
OCRnx
as TOP)
(clk
clk
clk
I/O
(FPWM)
I/O
Tn
/8)
(if used
TOP - 1
TOP - 1
Old OCRnx Value
TOP
TOP
ATtiny24A/44A/84A
BOTTOM
TOP - 1
clk_I/O
New OCRnx Value
/8)
BOTTOM + 1
TOP - 2
103

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