M30833FJFP#U5 Renesas Electronics America, M30833FJFP#U5 Datasheet - Page 496

• Manufacturer Part Number: M30833FJFP#U5
• Description: IC M32C/83 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJFP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
27.8 Timer
e
E
3
. v
J
2
0
27.8.1 Timers A and B
27.8.2 Timer A
C
1
9
3 .
B
8 /
The timers stop after reset. Set the TAiS(i=0 to 4) bit or TBjS(j=0 to 5) bit in the TABSR register or TBSR
register to "1" (starts counting) after setting operation mode, count source and counter.
Set the following registers and bits while the TAiS bit or TBjS bit is set to "0" (stops counting).
• TAiMR, TBjMR register
• TAi, TBj register
• UDF register
• TAZIE, TA0TGL, TA0TGH bits in the ONFS register
• TRGSR register
0
1
27.8.2.1 Timer A (Timer Mode)
27.8.2.2 Timer A (Event Counter Mode)
27.8.2.3 Timer A (One-shot Timer Mode)
3
0
(a) The TAiS bit (i=0 to 4) in the TABSR register is set to "0" (stops counting) after reset. Set the TAiS
(b) The TAi register indicates the counter value during counting at any given time. However, the
(c) TA1
(a) TAiS (i=0 to 4) bit in the TABSR register is set to "0" (stops counting) after reset. Set the TAiS bit to
(b) The TAi register indicates the counter values during counting at any given time. However, the
(c) The TA1
(a) TAiS (i=0 to 4) bit in the TABSR register is set to "0" (stops counting) after reset. Set TAiS bit to "1"
(b) The followings occur when setting the TABSR register to "0" (stops counting) while counting:
(c) The output of the one-shot timer is synchronized with an internal count source. When set to an
3
J
G
bit to "1" (starts counting) after selecting operation mode and setting the TAi register.
counter will read "FFFF
ter while the counter is stopped and before the counter starts counting.
applied to the NMI pin while INV03 to INV02 bits in the INVC0 register are set to "11
of the three-phase output by an "L" signal applied to the NMI pin)
"1" (starts counting) after selecting operation mode and setting the TAi register.
counter will read "FFFF
setting value can be read after setting the TAi register while the counter is stopped and before the
counter starts counting.
applied to the NMI pin while the INV03 to INV02 bit in the INVC0 register are set to "11
cutoff of the three-phase output by an "L" signal applied to the NMI pin).
(starts counting) after selecting operation mode and setting the TAi register.
external trigger, there is a delay of 1 count source cycle maximum, from trigger input to the TAi
to the one-shot timer output.
4
a
o r
0 -
• The counter stops counting and the microcomputer reloads contents of the reload register.
• The TAi
• The IR bit in the TAiIC register is set to "1" (interrupt requested) after 1 CPU clock cycle.
n
3 .
1
u
, 1
3
p
1
(
OUT
2
M
0
0
3
6
2
, TA2
OUT
OUT
C
Page 471
8 /
_______
, TA2
_______
, 3
pin becomes low ("L").
OUT
M
3
OUT
and TA4
2
C
f o
16
8 /
and TA4
16
4
" when reloading. The setting value can be read after setting the TAi regis-
3
8
" during underflow and "0000
) T
8
OUT
OUT
pins are placed in high-impedance states when an "L" signal is
pins are placed in high-impedance states when an "L" signal is
_______
16
" during overflow, when reloading. The
_______
27. Precautions (Timer)
2
" (forced cutoff
2
" (forced
IN
pin