PIC16F526-I/P Microchip Technology, PIC16F526-I/P Datasheet - Page 60

• Manufacturer Part Number: PIC16F526-I/P
• Description: IC PIC MCU FLASH 1KX12 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F526-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.5KB (1K x 12)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 11
• Ram Size: 67 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 3x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 67 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 3 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162096 - HEADER MPLAB ICD2 PIC16F526 8/14
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F526
9.1.5
This ADC does not have a dedicated ADC clock, and
therefore, no conversion in Sleep is possible. If a
conversion is underway and a Sleep command is
executed, the GO/DONE and ADON bit will be cleared.
This will stop any conversion in process and power-
down the ADC module to conserve power. Due to the
nature of the conversion process, the ADRES may con-
tain a partial conversion. At least 1 bit must have been
converted prior to Sleep to have partial conversion data
in ADRES. The ADCS and CHS bits are reset to their
default condition; ANS<1:0> = 11 and CHS<1:0> = 11.
• For accurate conversions, T
• 500 ns < T
• T
Shaded areas indicate T
conversions. If analog input is desired at these
frequencies, use INTOSC/8 for the ADC clock source.
TABLE 9-2:
TABLE 9-3:
DS41326E-page 60
INTOSC
FOSC
FOSC
FOSC
Entering
Sleep
Wake or
Reset
Source
following:
AD
= 1/(F
SLEEP
OSC
AD
ADCS
<1:0>
Unchanged Unchanged
11
10
01
00
< 50 s
/divisor)
ANS1
T
EFFECTS OF SLEEP ON ADCON0
1
AD
Divisor
FOR ADCS SETTINGS WITH VARIOUS OSCILLATORS
16
4
4
8
AD
out of range for accurate
ANS0
AD
1
.2 s
.4 s
.8 s
MHz
must meet the
20
—
.25 s
.5 s
MHz
1 s
ADCS1
16
—
1
1
8 MHz 4 MHz 1 MHz
.5 s
.5 s
1 s
2 s
ADCS0
1
1
1 s
1 s
2 s
4 s
16 s
4 s
8 s
—
CHS1
1
1
16 s
32 s
8 s
kHz
500
—
CHS0
23 s
46 s
11 s
kHz
350
1
1
—
 2010 Microchip Technology Inc.
20 s
40 s
80 s
GO/DONE
kHz
200
—
0
0
160 s
40 s
80 s
kHz
100
—
ADON
32 kHz
125 s
250 s
500 s
0
0
—