PIC16F526-I/P Microchip Technology, PIC16F526-I/P Datasheet - Page 36

IC PIC MCU FLASH 1KX12 14DIP

PIC16F526-I/P

Manufacturer Part Number
PIC16F526-I/P
Description
IC PIC MCU FLASH 1KX12 14DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16F526-I/P

Program Memory Type
FLASH
Program Memory Size
1.5KB (1K x 12)
Package / Case
14-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Ram Size
67 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 3x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
67 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 3 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162096 - HEADER MPLAB ICD2 PIC16F526 8/14
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F526
6.5
6.5.1
Some instructions operate internally as read followed
by write operations. The BCF and BSF instructions, for
example, read the entire port into the CPU, execute the
bit operation and rewrite the result. Caution must be
used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a BSF operation on bit 5 of PORTB will cause
all eight bits of PORTB to be read into the CPU, bit 5 to
be set and the PORTB value to be written to the output
latches. If another bit of PORTB is used as a bidirec-
tional I/O pin (say bit 0) and it is defined as an input at
this time, the input signal present on the pin itself would
be read into the CPU and rewritten to the data latch of
this particular pin, overwriting the previous content. As
long as the pin stays in the Input mode, no problem
occurs. However, if bit 0 is switched into Output mode
later on, the content of the data latch may now be
unknown.
Example 6-1 shows the effect of two sequential
Read-Modify-Write instructions (e.g., BCF, BSF, etc.)
on an I/O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired OR”, “wired
AND”). The resulting high output currents may damage
the chip.
FIGURE 6-11:
DS41326E-page 36
Instruction
Instruction
Executed
RB<5:0>
Fetched
I/O Programming Considerations
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
MOVWF PORTB
BIDIRECTIONAL I/O PORTS
PC
SUCCESSIVE I/O OPERATION
(Write to PORTB)
MOVF PORTB, W
MOVWF PORTB
Port pin
written here
PC + 1
MOVF PORTB,W
(Read PORTB)
Port pin
sampled here
NOP
PC + 2
PC + 3
NOP
NOP
EXAMPLE 6-1:
6.5.2
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (Figure 6-11).
Therefore, care must be exercised if a write followed by a
read operation is carried out on the same I/O port. The
sequence of instructions should allow the pin voltage to
stabilize (load dependent) before the next instruction
causes that file to be read into the CPU. Otherwise, the
previous state of that pin may be read into the CPU rather
than the new state. When in doubt, it is better to separate
these instructions with a NOP or another instruction not
accessing this I/O port.
;Initial PORTB Settings
;PORTB<5:3> Inputs
;PORTB<2:0> Outputs
;
;
;
;
Note 1:
BCF
BCF
MOVLW
TRIS
PORTB, 5 ;--01 -ppp
PORTB, 4 ;--10 -ppp
007h;
PORTB
The user may have expected the pin values to
be ‘--00 pppp’. The 2nd BCF caused RB5 to
be latched as the pin value (High).
SUCCESSIVE OPERATIONS ON
I/O PORTS
This example shows a write to PORTB
followed by a read from PORTB.
Data setup time = (0.25 T
where: T
Therefore, at higher clock frequencies, a
write followed by a read may be problematic.
T
CY
PD
;--10 -ppp
PORTB latch
----------
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT(e.g. DSTEMP)
= instruction cycle.
= propagation delay
 2010 Microchip Technology Inc.
CY
– T
PORTB pins
----------
--11 pppp
--11 pppp
--11 pppp
PD
)

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