SAF-XE167G-72F66L AC Infineon Technologies, SAF-XE167G-72F66L AC Datasheet - Page 37
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SAF-XE167G-72F66L AC
Manufacturer Part Number
SAF-XE167G-72F66L AC
Description
IC MCU 16BIT FLASH PG-LQFP-144
Manufacturer
Infineon Technologies
Series
XE16xr
Datasheet
1.SAF-XE167K-96F66L_AC.pdf
(122 pages)
Specifications of SAF-XE167G-72F66L AC
Core Processor
C166SV2
Core Size
16-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
576KB (576K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFQFP
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
118
Number Of Timers
11
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
FXE167G72F66LACXP
SAF-XE167G-72F66LACIN
SP000363815
SAF-XE167G-72F66LACIN
SP000363815
Table 4
Pin
2,
36,
38,
72,
74,
108,
110,
144
1,
37,
73,
109
1) To generate the reference clock output for bus timing measurement,
2) Pin TRef was used to control the core voltage generation in step AA. For that step, pin TRef must be connected
Data Sheet
EXTCLK and P2.8 must be selected as output pin. Also the high-speed clock pad must be enabled. This
configuration is referred to as reference clock output signal CLKOUT.
to
This connection is no more required from step AB on. For the current step, pin TRef is logically not connected.
Future derivatives will feature an additional general purpose IO pin at this position.
V
DDPB
Symbol
V
V
DDPB
SS
.
Pin Definitions and Functions (cont’d)
Ctrl.
-
-
Type Function
PS/B Digital Pad Supply Voltage for Domain B
PS/-- Digital Ground
Connect decoupling capacitors to adjacent
V
Note: The on-chip voltage regulators and all ports
All
or ground-plane.
Note: Also the exposed pad is connected to
DDP
V
SS
/
V
35
except P5, P6, and P15 are fed from supply
voltage
The respective board area must be
connected to ground (if soldered) or left free.
SS
pins must be connected to the ground-line
pin pairs as close as possible to the pins.
V
DDPB
.
XE166 Family Derivatives
General Device Information
f
SYS
must be selected as source for
V2.1, 2008-08
XE167x
V
SS
.