SAF-XE167G-72F66L AC Infineon Technologies, SAF-XE167G-72F66L AC Datasheet - Page 36
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SAF-XE167G-72F66L AC
Manufacturer Part Number
SAF-XE167G-72F66L AC
Description
IC MCU 16BIT FLASH PG-LQFP-144
Manufacturer
Infineon Technologies
Series
XE16xr
Datasheet
1.SAF-XE167K-96F66L_AC.pdf
(122 pages)
Specifications of SAF-XE167G-72F66L AC
Core Processor
C166SV2
Core Size
16-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
576KB (576K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFQFP
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
118
Number Of Timers
11
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
FXE167G72F66LACXP
SAF-XE167G-72F66LACIN
SP000363815
SAF-XE167G-72F66LACIN
SP000363815
Table 4
Pin
140
141
142
143
15
54,
91,
127
20
Data Sheet
Symbol
ESR2
U1C1_DX0D
U1C1_DX2C
U2C1_DX0E
U2C1_DX2B
EX1AINB
ESR0
U1C0_DX0E
U1C0_DX2B
P8.6
CCU60_
COUT63
CCU60_
CTRAPB
BRKIN_D
P8.5
CCU60_
COUT62
TCK_D
V
V
V
DDIM
DDI1
DDPA
Pin Definitions and Functions (cont’d)
Ctrl.
O0 / I St/B
I
I
I
I
I
O0 / I St/B
I
I
O0 / I St/B
O1
I
I
O0 / I St/B
O1
I
-
-
-
Type Function
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
PS/M Digital Core Supply Voltage for Domain M
PS/1 Digital Core Supply Voltage for Domain 1
PS/A Digital Pad Supply Voltage for Domain A
External Service Request 2
USIC1 Channel 1 Shift Data Input
USIC1 Channel 1 Shift Control Input
USIC1 Channel 1 Shift Data Input
USIC2 Channel 1 Shift Control Input
External Interrupt Trigger Input
External Service Request 0
Note: After power-up, ESR0 operates as open-
USIC1 Channel 0 Shift Data Input
USIC1 Channel 0 Shift Control Input
Bit 6 of Port 8, General Purpose Input/Output
CCU60 Channel 3 Output
CCU60 Emergency Trap Input
OCDS Break Signal Input
Bit 5 of Port 8, General Purpose Input/Output
CCU60 Channel 2 Output
JTAG Clock Input
Decouple with a ceramic capacitor, see
for details.
Decouple with a ceramic capacitor, see
for details.
All
Connect decoupling capacitors to adjacent
V
Note: The A/D_Converters and ports P5, P6, and
DDP
V
DDI1
/
V
34
drain bidirectional reset with a weak pull-up.
P15 are fed from supply voltage
SS
pins must be connected to each other.
pin pairs as close as possible to the pins.
XE166 Family Derivatives
General Device Information
V2.1, 2008-08
V
Table 12
Table 12
DDPA
XE167x
.