R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 373

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2)
Single address transfer by the DMAC or EXDMAC takes place as a full access (normal access) to
the SDRAM space. The DACK and EDACK signals are asserted within the Tr cycle and the BS
signal is also asserted in the Tr cycle.
When the SDRAM space is accessed with other than the single address transfer by the DMAC or
EXDMAC, a fast-page access is available.
Figures 9.85 and 9.86 show an output timing example of the DACK and EDACK signals when
DDS = 0 or EDDS = 0.
Figure 9.85 Output Timing Example of DACK and EDACK when DDS = 0 or EDDS = 0
When DDS = 0 or EDDS = 0
DACK or EDACK
Precharge-sel
Address bus
D15 to D8
SDRAMφ
D7 to D0
DQMLU
DQMLL
RD/WR
RAS
CAS
CKE
WE
CS
BS
PALL
Row address
T
p
(Write)
ACTV
address
Row
T
r
High
Column address
NOP
T
Rev. 2.00 Sep. 24, 2008 Page 339 of 1468
c1
WRIT
T
c2
Section 9 Bus Controller (BSC)
REJ09B0412-0200