DF2145BVTE10V Renesas Electronics America, DF2145BVTE10V Datasheet - Page 218

• Manufacturer Part Number: DF2145BVTE10V
• Description: IC H8S MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2145BVTE10V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2145BVTE10V

Section 2 Instruction Descriptions
2.2.57 (5)
SHAL (SHift Arithmetic Left)
Operation
ERd (left arithmetic shift)
Assembly-Language Format
SHAL.L ERd
Operand Size
Longword
Description
This instruction shifts the bits in a 32-bit register ERd (destination operand) one bit to the left. The
most significant bit (bit 31) shifts into the carry flag. The least significant bit (bit 0) is cleared to 0.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
The SHAL instruction differs from the SHLL instruction in its effect on the overflow flag.
Rev. 4.00 Feb 24, 2006 page 202 of 322
REJ09B0139-0400
Register direct
Addressing
Mode
SHAL (L)
Mnemonic
SHAL.L
C
ERd
MSB
b31
Operands
ERd
. . . . . .
1st byte
1
0
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Receives the previous value in bit 31.
2nd byte
B
Instruction Format
cleared to 0.
cleared to 0.
cleared to 0.
—
I
0 erd
UI H
—
—
3rd byte
LSB
b0
—
U
N
0
4th byte
Shift Arithmetic
Z
V
States
No. of
C
1