DF2145BVTE10V Renesas Electronics America, DF2145BVTE10V Datasheet - Page 173

IC H8S MCU FLASH 256K 100TQFP

DF2145BVTE10V

Manufacturer Part Number
DF2145BVTE10V
Description
IC H8S MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2145BVTE10V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2145BVTE10V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2145BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.2.44 (3)
NEG (NEGate)
Operation
0 – ERd
Assembly-Language Format
NEG.L ERd
Operand Size
Longword
Description
This instruction takes the two’s complement of the contents of a 32-bit register ERd (destination
operand) and stores the result in the 32-bit register ERd (subtracting the register contents from
H'00000000). If the original contents of ERd were H'80000000, however, the result remains
H'80000000.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
An overflow occurs if the original contents of ERd were H'80000000.
Register direct
Addressing
Mode
ERd
NEG (L)
Mnemonic
NEG.L
Operands
ERd
1st byte
1
7
Condition Code
H: Set to 1 if there is a borrow at bit 27;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 31;
2nd byte
B
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
Rev. 4.00 Feb 24, 2006 page 157 of 322
I
0 erd
UI H
Section 2 Instruction Descriptions
3rd byte
U
Negate Binary Signed
N
4th byte
REJ09B0139-0400
Z
V
States
No. of
C
1

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