DF2145BVTE10V Renesas Electronics America, DF2145BVTE10V Datasheet - Page 108

IC H8S MCU FLASH 256K 100TQFP

DF2145BVTE10V

Manufacturer Part Number
DF2145BVTE10V
Description
IC H8S MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2145BVTE10V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2145BVTE10V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2145BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 2 Instruction Descriptions
2.2.23 (2)
CMP (CoMPare)
Operation
Rd – (EAs), set/clear CCR
Assembly-Language Format
CMP.W <EAs>, Rd
Operand Size
Word
Description
This instruction subtracts the source operand from the contents of a 16-bit register Rd (destination
operand) and sets or clears the condition code bits according to the result. The contents of the 16-
bit register Rd remain unchanged.
Available Registers
Rd: R0 to R7, E0 to E7
Rs: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Notes
Rev. 4.00 Feb 24, 2006 page 92 of 322
REJ09B0139-0400
Immediate
Register direct
Addressing
Mode
CMP (W)
Mnemonic
CMP.W
CMP.W
#xx:16, Rd
Operands
Rs, Rd
1st byte
7
1
D
9
Condition Code
H: Set to 1 if there is a borrow at bit 11;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 15;
2nd byte
rs
2
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
I
rd
rd
UI H
3rd byte
U
IMM
N
4th byte
Z
V
Compare
States
No. of
C
2
1

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