DF2145BVTE10V Renesas Electronics America, DF2145BVTE10V Datasheet - Page 119

IC H8S MCU FLASH 256K 100TQFP

DF2145BVTE10V

Manufacturer Part Number
DF2145BVTE10V
Description
IC H8S MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2145BVTE10V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2145BVTE10V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2145BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.2.27 (2)
DIVXS (DIVide eXtend as Signed)
Operation
ERd
Assembly-Language Format
DIVXS.W Rs, ERd
Operand Size
Word
Description
This instruction divides the contents of a 32-bit register ERd (destination operand) by the contents
of a 16-bit register Rs (source operand) and stores the result in the 32-bit register ERd. The
division is signed. The operation performed is 32 bits
remainder. The quotient is placed in the lower 16 bits (Rd) of the 32-bit register ERd. The
remainder is placed in the upper 16 bits (Ed). The sign of the remainder matches the sign of the
dividend.
Valid results are not assured if division by zero is attempted or an overflow occurs.
Available Registers
ERd: ER0 to ER7
Rs:
R0 to R7, E0 to E7
Rs
DIVXS (W)
ERd
Dividend
32 bits
ERd
Divisor
16 bits
Rs
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the quotient is negative;
Z: Set to 1 if the divisor is zero; otherwise
V: Previous value remains unchanged.
C: Previous value remains unchanged.
16 bits
otherwise cleared to 0.
cleared to 0.
Remainder
Rev. 4.00 Feb 24, 2006 page 103 of 322
I
16 bits
UI H
Section 2 Instruction Descriptions
ERd
16-bit quotient and 16-bit
Quotient
16 bits
U
N
REJ09B0139-0400
Z
Divide Signed
— —
V
C

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