MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 93

• Manufacturer Part Number: MC9S12HZ128CAL
• Description: IC MCU 16BIT 128K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128CAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

is determined by the Flash security byte (0xFF0F). The backdoor key access sequence has no effect on the
program and erase protections defined in the Flash protection register.
It is not possible to unsecure the MCU in special single-chip mode by using the backdoor key access
sequence via the background debug mode (BDM).
2.6.2
The MCU can be unsecured in special single-chip mode by erasing the Flash module by the following
method :
After the CCIF flag sets to indicate that the mass operation has completed, reset the MCU into special
single-chip mode. The BDM secure ROM will verify that the Flash memory is erased and will assert the
UNSEC bit in the BDM status register. This BDM action will cause the MCU to override the Flash security
state and the MCU will be unsecured. All BDM commands will be enabled and the Flash security byte
may be programmed to the unsecure state by the following method:
2.7
2.7.1
On each reset, the Flash module executes a reset sequence to hold CPU activity while loading the following
registers from the Flash memory according to
2.7.2
If a reset occurs while any Flash command is in progress, that command will be immediately aborted. The
state of the word being programmed or the sector / block being erased is not guaranteed.
2.8
The Flash module can generate an interrupt when all Flash command operations have completed, when the
Flash address, data, and command buffers are empty.
Freescale Semiconductor
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Reset the MCU into special single-chip mode, delay while the erase test is performed by the BDM
secure ROM, send BDM commands to disable protection in the Flash module, and execute a mass
erase command write sequence to erase the Flash memory.
Send BDM commands to execute a word program sequence to program the Flash security byte to
the unsecured state and reset the MCU.
FPROT — Flash Protection Register (see
FCTL — Flash Control Register (see
FSEC — Flash Security Register (see
Resets
Interrupts
Unsecuring the Flash Module in Special Single-Chip Mode using
BDM
Flash Reset Sequence
Reset While Flash Command Active
MC9S12HZ256 Data Sheet, Rev. 2.05
Section
Section
Table
Section
2-1:
2.3.2.9).
2.3.2.2).
2.3.2.5).
Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
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