MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 603

IC MCU 16BIT 128K FLASH 112-LQFP

MC9S12HZ128CAL

Manufacturer Part Number
MC9S12HZ128CAL
Description
IC MCU 16BIT 128K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12HZ128CAL

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12HZ128CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 22
Module Mapping Control (MMCV4)
22.1
Introduction
This section describes the functionality of the module mapping control (MMC) sub-block of the S12 core
platform.
The block diagram of the MMC is shown in
Figure
22-1.
MMC
MMC_SECURE
SECURE
SECURITY
BDM_UNSECURE
STOP, WAIT
ADDRESS DECODE
READ & WRITE ENABLES
REGISTERS
CLOCKS, RESET
PORT K INTERFACE
INTERNAL MEMORY
MODE INFORMATION
EXPANSION
MEMORY SPACE SELECT(S)
PERIPHERAL SELECT
EBI ALTERNATE ADDRESS BUS
CORE SELECT (S)
EBI ALTERNATE WRITE DATA BUS
EBI ALTERNATE READ DATA BUS
ALTERNATE ADDRESS BUS (BDM)
ALTERNATE WRITE DATA BUS (BDM)
BUS CONTROL
CPU ADDRESS BUS
CPU READ DATA BUS
ALTERNATE READ DATA BUS (BDM)
CPU WRITE DATA BUS
CPU CONTROL
Figure 22-1. MMC Block Diagram
The MMC is the sub-module which controls memory map assignment and selection of internal resources
and external space. Internal buses between the core and memories and between the core and peripherals is
controlled in this module. The memory expansion is generated in this module.
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
603

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