MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 143

IC MCU 16BIT 128K FLASH 112-LQFP

MC9S12HZ128CAL

Manufacturer Part Number
MC9S12HZ128CAL
Description
IC MCU 16BIT 128K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12HZ128CAL

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12HZ128CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
4.3.5
Port S is associated with the serial peripheral interface (SPI) and serial communication interface (SCI0).
Each pin is assigned to these modules according to the following priority: SPI/SCI0 > general-purpose I/O.
When the SPI is enabled, the PS[7:4] pins become SS, SCK, MOSI, and MISO respectively. Refer to the
SPI block description chapter for information on enabling and disabling the SPI.
When the SCI0 receiver and transmitter are enabled, the PS[1:0] pins become TXD0 and RXD0
respectively. Refer to the SCI block description chapter for information on enabling and disabling the SCI
receiver and transmitter.
During reset, port S pins are configured as high-impedance inputs.
4.3.5.1
Read: Anytime. Write: Anytime.
If the associated data direction bit (DDRSx) is set to 1 (output), a read returns the value of the I/O register
bit. If the associated data direction bit (DDRSx) is set to 0 (input), a read returns the value of the pin.
The SPI function takes precedence over the general-purpose I/O function if the SPI is enabled.
If enabled, the SCI0 transmitter takes precedence over the general-purpose I/O function, and the
corresponding TXD0 pin is configured as an output. If enabled, the SCI0 receiver takes precedence over
the general-purpose I/O function, and the corresponding RXD0 pin is configured as an input.
Freescale Semiconductor
SPI/SCI:
Reset
W
R
Port S
PTS7
SS
Port S I/O Register (PTS)
0
7
= Reserved or Unimplemented
PTS6
SCK
0
6
Figure 4-30. Port S I/O Register (PTS)
PTS5
MOSI
MC9S12HZ256 Data Sheet, Rev. 2.05
0
5
PTS4
MISO
0
4
0
0
3
Chapter 4 Port Integration Module (PIM9HZ256V2)
0
0
2
PTS1
TXD0
0
1
PTS0
RXD0
0
0
143

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