MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 366

• Manufacturer Part Number: MC9S12HZ128CAL
• Description: IC MCU 16BIT 128K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128CAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
12.3.3.4
This register defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number.
The MSCAN implements the following internal prioritization mechanisms:
In cases of more than one buffer having the same lowest priority, the message buffer with the lower index
number wins.
Read: Anytime when TXEx flag is set (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
“MSCAN Transmit Buffer Selection Register
Write: Anytime when TXEx flag is set (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
“MSCAN Transmit Buffer Selection Register
12.3.3.5
If the TIME bit is enabled, the MSCAN will write a special time stamp to the respective registers in the
active transmit or receive buffer as soon as a message has been acknowledged on the CAN bus (see
366
•
•
Reset:
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
The transmission buffer with the lowest local priority field wins the prioritization.
W
R
Transmit Buffer Priority Register (TBPR)
Time Stamp Register (TSRH–TSRL)
PRIO7
0
7
DLC3
0
0
0
0
0
0
0
0
1
Figure 12-33. Transmit Buffer Priority Register (TBPR)
PRIO6
6
0
DLC2
MC9S12HZ256 Data Sheet, Rev. 2.05
0
0
0
0
1
1
1
1
0
Table 12-34. Data Length Codes
Data Length Code
PRIO5
0
5
Section 12.3.2.7, “MSCAN Transmitter Flag Register
Section 12.3.2.7, “MSCAN Transmitter Flag Register
(CANTBSEL)”).
(CANTBSEL)”).
PRIO4
DLC1
4
0
0
0
1
1
0
0
1
1
0
PRIO3
0
3
DLC0
0
1
0
1
0
1
0
1
0
PRIO2
2
0
Data Byte
Count
Freescale Semiconductor
PRIO1
0
1
2
3
4
5
6
7
8
Section 12.3.2.11,
Section 12.3.2.11,
0
1
PRIO0
0
0