MC56F8322MFAE Freescale Semiconductor, MC56F8322MFAE Datasheet - Page 92

• Manufacturer Part Number: MC56F8322MFAE
• Description: IC DSP 16BIT 60MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8322MFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Program Memory Size: 40KB (20K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 60MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 21
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 2.75/3.6V
• Operating Supply Voltage (min): 2.25/3V
• On-chip Adc: 2(3-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 40 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 4 KB
• Operating Supply Voltage: - 0.3 V to + 4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Rom Size: 8 KB
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8323EVME - BOARD EVALUATION MC56F8323
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

With this register set, an interrupt driver can set the SIM_ISALL register pair to point to its peripheral
registers and then use the I/O Short addressing mode to reference them. The ISR should restore this register
to its previous contents prior to returning from interrupt.
Note:
Note:
6.5.10.1
This field represents the upper two address bits of the “hard coded” I/O short address.
92
Base + $D
Base + $E
RESET
RESET
Write
Write
Read
Read
The default value of this register set points to the EOnCE registers.
The pipeline delay between setting this register set and using short I/O addressing with the new value
is five cycles.
Input/Output Short Address Low (ISAL[23:22])—Bit 1–0
Figure 6-14 I/O Short Address Location High Register (SIM_ISALH)
Figure 6-15 I/O Short Address Location Low Register (SIM_ISALL)
15
15
2 bits from SIM_ISALH Register
Full 24-Bit for Short I/O Address
1
1
1
16 Bits from SIM_ISALL Register
14
14
1
1
1
Figure 6-13 I/O Short Address Determination
13
13
1
1
1
6 Bits from I/O Short Address Mode Instruction
12
12
1
1
1
56F8322 Techncial Data, Rev. 16
11
11
1
1
1
10
10
1
1
1
“
Hard Coded” Address Portion
9
1
1
9
1
8
8
1
1
1
ISAL[21:6]
7
7
1
1
1
6
6
1
1
1
5
5
1
1
1
Instruction Portion
4
4
1
1
1
3
3
1
1
1
Freescale Semiconductor
2
2
1
1
1
ISAL[23:22]
1
1
1
1
Preliminary
0
0
1
1