MC56F8322MFAE Freescale Semiconductor, MC56F8322MFAE Datasheet - Page 82

IC DSP 16BIT 60MHZ 48-LQFP

MC56F8322MFAE

Manufacturer Part Number
MC56F8322MFAE
Description
IC DSP 16BIT 60MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8322MFAE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
40KB (20K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
60MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
21
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.75/3.6V
Operating Supply Voltage (min)
2.25/3V
On-chip Adc
2(3-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Operating Supply Voltage
- 0.3 V to + 4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Rom Size
8 KB
Minimum Operating Temperature
- 40 C
For Use With
MC56F8323EVME - BOARD EVALUATION MC56F8323
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC56F8322MFAE
Manufacturer:
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Quantity:
12 500
Part Number:
MC56F8322MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8322MFAE
Manufacturer:
FREESCALE
Quantity:
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6.5.1
6.5.1.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
82
Offset
Add.
$C
$D
$0
$1
$2
$3
$4
$5
$6
$7
$8
$A
$B
$E
Base + $0
RESET
Read
Write
SIM_MSH_ID
SIM_LSH_ID
SIM_ISALH
SIM_PUDR
SIM_ISALL
CONTROL
SIM_SCR0
SIM_SCR1
SIM_SCR2
SIM_SCR3
SIM_GPS
SIM_PCE
Reserved
CLKOSR
Register
RSTSTS
Name
SIM Control Register (SIM_CONTROL)
SIM_
SIM_
SIM_
Reserved—Bits 15–6
W
W
W
W
W
W
W
W
W
W
W
W
W
W
15
R
R
R
R
R
R
R
R
R
R
R
R
R
R
0
0
15
0
0
0
0
0
0
0
1
1
Figure 6-3 SIM Control Register (SIM_CONTROL)
14
0
0
= Reserved
14
0
0
0
0
0
0
0
1
1
13
Figure 6-2 SIM Register Map Summary
0
0
ADCA
13
0
0
0
0
0
0
0
1
12
0
0
CAN
12
0
0
0
0
0
0
0
1
56F8322 Techncial Data, Rev. 16
11
0
0
RESET
11
0
0
0
0
0
0
1
1
10
0
0
DEC0
IRQ
10
0
0
0
0
0
0
1
9
0
0
PHSA PHSB INDEX HOME
9
0
0
0
0
0
0
1
1
8
0
0
TMRC
8
ISAL[21:6]
0
0
1
0
0
0
1
FIELD
FIELD
FIELD
FIELD
7
0
0
C6
7
0
0
1
0
0
1
1
6
0
0
TMRA
C5
6
0
0
1
0
0
1
ONCE
EBL0
5
0
ONCE
EBL0
SWR
SCI1
CLK
DIS
B1
5
1
0
0
1
RST
SW
4
0
COPR EXTR
SCI0
RST
SW
B0
4
1
1
0
1
3
JTAG
DISABLE
0
SPI1
STOP_
A5
3
DISABLE
0
1
1
Freescale Semiconductor
STOP_
CLKOSEL
POR
SPI0
2
0
A4
2
1
1
0
1
ISAL[23:22]
1
DISABLE
A3
0
1
DISABLE
0
0
0
0
1
WAIT_
WAIT_
Preliminary
PWMA
A2
0
0
0
0
1
0
0

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