MC56F8322MFAE Freescale Semiconductor, MC56F8322MFAE Datasheet - Page 88

• Manufacturer Part Number: MC56F8322MFAE
• Description: IC DSP 16BIT 60MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8322MFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Program Memory Size: 40KB (20K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 60MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 21
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 2.75/3.6V
• Operating Supply Voltage (min): 2.25/3V
• On-chip Adc: 2(3-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 40 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 4 KB
• Operating Supply Voltage: - 0.3 V to + 4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Rom Size: 8 KB
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8323EVME - BOARD EVALUATION MC56F8323
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

As shown in
decides which peripheral will be routed to the I/O.
6.5.8.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.8.2
This bit selects the alternate function for GPIOC6.
6.5.8.3
This bit selects the alternate function for GPIOC5.
88
•
•
•
•
Base + $B
RESET
0 = TC0 (default)
1 = TXD0
0 = TC1 (default)
1 = RXD0
Read
Write
Figure
Reserved—Bits 15–8
GPIO C6 (C6)—Bit 7
GPIOC5 (C5)—Bit 6
Figure 6-10 Overall Control of Pads Using SIM_GPS Control
15
0
0
Figure 6-11 GPIO Peripheral Select Register (SIM_GPS)
6-10, the GPIO has the final control over which pin controls the I/O. SIM_GPS simply
Quad Timer Controlled
14
0
0
13
0
0
SCI Controlled
12
0
0
SIM_GPS Register
11
0
0
56F8322 Techncial Data, Rev. 16
GPIO Controlled
10
0
0
9
0
0
0
1
GPIOX_PER Register
8
0
0
C6
7
0
C5
6
0
0
1
B1
5
0
I/O Pad Control
B0
4
0
A5
3
0
Freescale Semiconductor
A4
2
0
A3
1
0
Preliminary
A2
0
0