MC56F8322MFAE Freescale Semiconductor, MC56F8322MFAE Datasheet - Page 48

IC DSP 16BIT 60MHZ 48-LQFP

MC56F8322MFAE

Manufacturer Part Number
MC56F8322MFAE
Description
IC DSP 16BIT 60MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8322MFAE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
40KB (20K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
60MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
21
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.75/3.6V
Operating Supply Voltage (min)
2.25/3V
On-chip Adc
2(3-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Operating Supply Voltage
- 0.3 V to + 4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Rom Size
8 KB
Minimum Operating Temperature
- 40 C
For Use With
MC56F8323EVME - BOARD EVALUATION MC56F8323
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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MC56F8322MFAE
Manufacturer:
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48
GPIOC_PUR
GPIOC_DR
GPIOC_DDR
GPIOC_PER
GPIOC_IAR
GPIOC_IENR
GPIOC_IPOLR
GPIOC_IPR
GPIOC_IESR
GPIOC_PPMODE
GPIOC_RAWDATA
SIM_CONTROL
SIM_RSTSTS
SIM_SCR0
SIM_SCR1
SIM_SCR2
SIM_SCR3
SIM_MSH_ID
SIM_LSH_ID
SIM_PUDR
SIM_CLKOSR
SIM_GPS
SIM_PCE
SIM_ISALH
SIM_ISALL
LVI_CONTROL
LVI_STATUS
Register Acronym
Register Acronym
Register Acronym
Table 4-24 System Integration Module Registers Address Map
Table 4-25 Power Supervisor Registers Address Map
Table 4-23 GPIOC Registers Address Map
Address Offset
Address Offset
Address Offset
(GPIOC_BASE = $00F310)
$A
$0
$1
$2
$3
$4
$5
$6
$7
$8
$9
$C
$D
$A
$B
$E
$0
$1
$0
$1
$2
$3
$4
$5
$6
$7
$8
56F8322 Techncial Data, Rev. 16
(SIM_BASE = $00 F350)
(LVI_BASE = $00 F360)
Pull-up Enable Register
Data Register
Data Direction Register
Peripheral Enable Register
Interrupt Assert Register
Interrupt Enable Register
Interrupt Polarity Register
Interrupt Pending Register
Interrupt Edge-Sensitive Register
Push-Pull Mode Register
Raw Data Input Register
Control Register
Reset Status Register
Software Control Register 0
Software Control Register 1
Software Control Register 2
Software Control Register 3
Most Significant Half JTAG ID
Least Significant Half JTAG ID
Pull-up Disable Register
Reserved
Clock Out Select Register
GPIO Peripheral Select Register
Peripheral Clock Enable Register
I/O Short Address Location High Register
I/O Short Address Location Low Register
Control Register
Status Register
Register Description
Register Description
Register Description
Reset Value
Freescale Semiconductor
0 x 007C
0 x 0000
0 x 0000
0 x 007F
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 007F
Preliminary

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