C8051F327-GM Silicon Laboratories Inc, C8051F327-GM Datasheet - Page 74

IC 8051 MCU FLASH 16K 28QFN

C8051F327-GM

Manufacturer Part Number
C8051F327-GM
Description
IC 8051 MCU FLASH 16K 28QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F327-GM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART, USB
Peripherals
POR
Number Of I /o
15
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
UART/USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
15
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F326DK
Minimum Operating Temperature
- 40 C
Package
28QFN EP
Device Core
8051
Family Name
C8051F327
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1481 - DAUGHTER CARD TOOLSTCK C8051F327770-1006 - ISP 4PORT FOR SILABS C8051F MCU
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1297-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F327-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
C8051F326/7
10.2. Internal Low-Frequency (L-F) Oscillator
C8051F326/7 devices include a low-frequency oscillator. The OSCLCN register (see SFR Definition 10.3)
is used to enabled the oscillator.
10.3. CMOS External Clock Input
A CMOS clock can be used as an external clock input. The CMOS clock should be wired to the XTAL2 pin
(P0.3) as shown in Figure 10.1 on Page 71. Port pins must be configured when using the external oscilla-
tor circuit. The Port I/O Crossbar should be configured to allow digital inputs be setting INPUTEN (GPI-
OCN.6). Also, P0.3 should be configured to open drain mode. See Section “11. Port Input/Output” on
page 79 for more information.
74
Bit7:
Bit6–0:
OSCLEN
R/W
Bit7
OSCLEN: Internal L-F Oscillator Enable.
0: Internal L-F Oscillator Disabled.
1: Internal L-F Oscillator Enabled.
Unused. Read = 0000000b. Write = don’t care.
SFR Definition 10.3. OSCLCN: Internal L-F Oscillator Control
Bit6
R
Bit5
R
Bit4
R
Rev. 1.1
Bit3
R
Bit2
R
Bit1
R
Bit0
R
SFR Address:
Reset Value
0xxxxxxx
0xE3

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