C8051F327-GM Silicon Laboratories Inc, C8051F327-GM Datasheet - Page 65

• Manufacturer Part Number: C8051F327-GM
• Description: IC 8051 MCU FLASH 16K 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F327-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: UART/USART, USB
• Peripherals: POR
• Number Of I /o: 15
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F326DK
• Minimum Operating Temperature: - 40 C
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F327
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1481 - DAUGHTER CARD TOOLSTCK C8051F327770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1297-5

8.2.
The Flash memory can be used for non-volatile data storage as well as program code. This allows data
such as calibration coefficients to be calculated and stored at run time. Data is written using the MOVX
write instruction and read using the MOVC instruction.
Note: MOVX read instructions always target XRAM.
8.3.
The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft-
ware as well as to prevent the viewing of proprietary program code and constants. The Program Store
Write Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register
PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly
set to ‘1’ before software can modify the Flash memory; both PSWE and PSEE must be set to ‘1’ before
software can erase Flash memory. Additional security features prevent proprietary program code and data
constants from being read or altered across the C2 interface.
A Security Lock Byte located at the last byte of Flash user space offers protection of the Flash program
memory from access (reads, writes, or erases) by unprotected code or the C2 interface. The Flash security
mechanism allows the user to lock n 512-byte Flash pages, starting at page 0 (addresses 0x0000 to
0x01FF), where n is the 1’s compliment number represented by the Security Lock Byte. See example
below.
Important Notes About the Flash Security:
Security Lock Byte:
1s Compliment:
Flash pages locked:
Addresses locked:
Non-volatile Data Storage
Security Options
1. Clearing any bit of the Lock Byte to ‘0’ will lock the Flash page containing the Lock Byte (in
2. Locked pages cannot be read, written, or erased via the C2 interface.
3. Locked pages cannot be read, written, or erased by user firmware executing from unlocked
4. User firmware executing in a locked page may read and write Flash memory in any locked or
5. User firmware executing in a locked page may erase Flash memory in any locked or unlocked
6. Locked pages can only be unlocked through the C2 interface with a C2 Device Erase com-
7. If a user firmware Flash access attempt is denied (per restrictions #3, #4, and #5 above), a
addition to the selected pages).
memory space.
unlocked page excluding the reserved area.
page excluding the reserved area and the page containing the Lock Byte.
mand.
Flash Error system reset will be generated.
11111101b
00000010b
2
0x0000 to 0x03FF
Rev. 1.1
C8051F326/7
65