C8051F327-GM Silicon Laboratories Inc, C8051F327-GM Datasheet - Page 133

• Manufacturer Part Number: C8051F327-GM
• Description: IC 8051 MCU FLASH 16K 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F327-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: UART/USART, USB
• Peripherals: POR
• Number Of I /o: 15
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F326DK
• Minimum Operating Temperature: - 40 C
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F327
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1481 - DAUGHTER CARD TOOLSTCK C8051F327770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1297-5

Bit7–4:
Bit3:
Bit2:
Bits1–0: SCA1-SCA0: Timer 0/1 Prescale Bits.
R/W
Bit7
—
Unused. Read = 0b. Write = don’t care.
T1M: Timer 1 Clock Select.
This select the clock source supplied to Timer 1.
0: Timer 1 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit selects the clock source supplied to Timer 0.
0: Timer 0 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Timer 0 uses the system clock.
These bits control the division of the clock supplied to Timer 0 and/or Timer 1 if configured
to use prescaled clock inputs.
Note: External clock divided by 8 is synchronized with the system clock.
SCA1
R/W
Bit6
—
0
0
1
SFR Definition 14.3. CKCON: Clock Control
R/W
Bit5
—
SCA0
0
1
0
R/W
Bit4
—
Rev. 1.1
System clock divided by 12
System clock divided by 48
System clock divided by 4
T1M
R/W
Bit3
Prescaled Clock
T0M
R/W
Bit2
SCA1
R/W
Bit1
C8051F326/7
SCA0
R/W
Bit0
SFR Address:
00000000
Reset Value
0x8E
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