C8051F327-GM Silicon Laboratories Inc, C8051F327-GM Datasheet - Page 114

• Manufacturer Part Number: C8051F327-GM
• Description: IC 8051 MCU FLASH 16K 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F327-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: UART/USART, USB
• Peripherals: POR
• Number Of I /o: 15
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F326DK
• Minimum Operating Temperature: - 40 C
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F327
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1481 - DAUGHTER CARD TOOLSTCK C8051F327770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1297-5

C8051F326/7
114
USB Register Definition 12.22. EOUTCSRH: USB0 OUT Endpoint Control High Byte
Bit7:
Bit6:
Bits5–0: Unused. Read = 000000b. Write = don’t care.
Bits7–0: EOCL: OUT Endpoint Count Low Byte
Bits7–2: Unused. Read = 00000b. Write = don’t care.
Bits1–0: EOCH: OUT Endpoint Count High Byte
DBOEN
USB Register Definition 12.24. EOUTCNTH: USB0 OUT Endpoint Count High
USB Register Definition 12.23. EOUTCNTL: USB0 OUT Endpoint Count Low
R/W
Bit7
Bit7
Bit7
—
R
R
DBOEN: Double-buffer Enable
0: Double-buffering disabled for the selected OUT endpoint.
1: Double-buffering enabled for the selected OUT endpoint.
ISO: Isochronous Transfer Enable
This bit enables/disables isochronous transfers on the current endpoint.
0: Endpoint configured for bulk/interrupt transfers.
1: Endpoint configured for isochronous transfers.
EOCL holds the lower 8-bits of the 10-bit number of data bytes in the last received packet in
the current OUT endpoint FIFO. This number is only valid while OPRDY = ‘1’.
EOCH holds the upper 2-bits of the 10-bit number of data bytes in the last received packet in
the current OUT endpoint FIFO. This number is only valid while OPRDY = ‘1’.
ISO
R/W
Bit6
Bit6
Bit6
—
R
R
R/W
Bit5
Bit5
Bit5
—
—
R
R
R/W
Bit4
Bit4
Bit4
—
—
R
R
EOCL
Rev. 1.1
Bit3
Bit3
Bit3
—
—
R
R
R
Bit2
Bit2
Bit2
—
—
R
R
R
Bit1
Bit1
Bit1
—
R
R
R
E0CH
Bit0
Bit0
Bit0
—
R
R
R
USB Address:
USB Address:
USB Address:
00000000
00000000
00000000
Reset Value
Reset Value
Reset Value
0x15
0x16
0x17