C8051F996-GM Silicon Laboratories Inc, C8051F996-GM Datasheet - Page 91
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C8051F996-GM
Manufacturer Part Number
C8051F996-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F996-GM
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1943-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F996-GM
Manufacturer:
SILICON
Quantity:
570
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7.
C8051F99x-C8051F98x devices include an on-chip programmable voltage comparator: Comparator 0
(CPT0) shown in Figure 7.1.
The Comparator offers programmable response time and hysteresis, an analog input multiplexer, and two
outputs that are optionally available at the Port pins: a digital synchronous “latched” output (CP0), or a
digital asynchronous “raw” output (CP0A). The asynchronous CP0A signal is available even when the
system clock is not active. This allows the Comparator to operate and generate an output when the device
is in some low power modes.
7.1.
Each Comparator performs an analog comparison of the voltage levels at its positive (CP0+) and negative
(CP0-) input. The analog input multiplexers are completely under software control and configured using
SFR registers. See Section “7.6. Comparator0 Analog Multiplexer” on page 96 for details on how to select
and configure Comparator inputs.
Important Note About Comparator Inputs: The Port pins selected as Comparator inputs should be
configured as analog inputs and skipped by the Crossbar. See the Port I/O chapter for more details on how
to configure Port I/O pins as Analog Inputs. The Comparator may also be used to compare the logic level
of digital signals, however, Port I/O pins configured as digital inputs must be driven to a valid logic state
(HIGH or LOW) to avoid increased power consumption.
Comparator
Comparator Inputs
P1.0
P1.1
Figure 7.1. Comparator 0 Functional Block Diagram
CP0HYN1
CP0HYN0
CP0HYP1
CP0HYP0
CP0OUT
CP0RIF
CP0FIF
CP0EN
CP0 +
CP0 -
+
-
Rev. 1.0
VDD
Px.x
GND
Decision
C8051F99x-C8051F98x
Reset
CPT0MD
Tree
(ASYNCHRONOUS)
(SYNCHRONIZER)
D
SET
CLR
Q
Q
D
SET
CLR
Q
Q
Rising-edge
CP0
Crossbar
Interrupt
Logic
Falling-edge
Interrupt
CP0
CP0A
CP0
CP0
91
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