C8051F996-GM Silicon Laboratories Inc, C8051F996-GM Datasheet - Page 32

IC MCU 8BIT 8KB FLASH 24QFN

C8051F996-GM

Manufacturer Part Number
C8051F996-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F996-GM

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1943-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F996-GM
Manufacturer:
SILICON
Quantity:
570
C8051F99x-C8051F98x
3.
32
*Note: Available only on the C8051F980/2/6/8 and C8051F990/6 devices.
XTAL3
XTAL4
Name
C2CK
V
P2.7/
P1.6/
P1.7/
P0.0/
GND
RST/
C2D
V
REF
DD
Pinout and Package Definitions
*
‘F980/1/2
‘F983/5
‘F990/1
3, 12
-GM
4
5
6
8
7
2
Pin Numbers
Table 3.1. Pin Definitions for the C8051F99x-C8051F98x
‘F986/7
‘F988/9
‘F996/7
-GM
24
3
2
6
7
9
8
‘F986/7
‘F988/9
‘F996/7
-GU
10
12
11
6
5
9
3
D I/O or
A Out
D I/O
D I/O
D I/O
D I/O
D I/O
D I/O
Type
P In
A In
A In
A In
G
Rev. 1.0
Description
Power Supply Voltage. Must be 1.8 to 3.6 V.
Required Ground.
Device Reset. Open-drain output of internal POR or V
monitor. An external source can initiate a system reset
by driving this pin low for at least 15 µs. A 1 k to 5 k
pullup to V
Sources” on page 179 Section for a complete
description.
Clock signal for the C2 Debug Interface.
Port 2.7. This pin can only be used as GPIO. The
Crossbar cannot route signals to this pin and it cannot be
configured as an analog input. See Port I/O Section for a
complete description.
Bi-directional data signal for the C2 Debug Interface.
Port 1.6. See Port I/O Section for a complete description.
SmaRTClock Oscillator Crystal Input.
See Section 20 for a complete description.
Port 1.7. See Port I/O Section for a complete description.
SmaRTClock Oscillator Crystal Output.
See Section 20 for a complete description.
Port 0.0. See Port I/O Section for a complete description.
External V
See Section “5.9. Voltage and Ground Reference
Options” on page 86.
REF
DD
is recommended. See Section “18. Reset
Input.
DD

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