C8051F996-GM Silicon Laboratories Inc, C8051F996-GM Datasheet - Page 131
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C8051F996-GM
Manufacturer Part Number
C8051F996-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F996-GM
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1943-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F996-GM
Manufacturer:
SILICON
Quantity:
570
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12. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the C8051F99x-C8051F98x's resources and
peripherals. The CIP-51 controller core duplicates the SFRs found in a typical 8051 implementation as well
as implementing additional SFRs used to configure and access the sub-systems unique to the
C8051F99x-C8051F98x. This allows the addition of new functionality while retaining compatibility with the
MCS-51™ instruction set. Table 12.1 and Table 12.2 list the SFRs implemented in the C8051F99x-
C8051F98x device family.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g., P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the data sheet, as indicated in
Table 12.3, for a detailed description of each register.
F8 SPI0CN
F0
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2
E0
D8 PCA0CN PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2
D0
C8 TMR2CN REG0CN
C0 SMB0CN SMB0CF
B8
B0 CS0CN
A8
A0
98 SCON0
90
88
80
(bit addressable)
TCON
PSW
ACC
0(8)
P2
P1
P0
IP
IE
B
Table 12.1. Special Function Register (SFR) Memory Map (Page 0x0)
IREF0CN
OSCXCN
SPI0CFG
TMR3CN
REF0CN CS0SCAN0 CS0SCAN1
CLKSEL
P0MDIN
SBUF0
PCA0L
TMOD
XBR0
1(9)
SP
CRC0CNT
SMB0DAT ADC0GTL ADC0GTH
TMR2RLL TMR2RLH
TMR3RLL TMR3RLH
SPI0CKR
ADC0AC
P1MDIN
OSCICN
PCA0H
CS0CF
XBR1
DPL
2(A)
TL0
PCA0CPL0 PCA0CPH0
ADC0PWR
SPI0DAT
CS0MD2
CPT0CN
OSCICL
CS0MX
XBR2
DPH
3(B)
TL1
Rev. 1.0
SMB0ADR
P0MDOUT
CRC0FLIP
RTC0ADR
CRC0CN
ADC0TK
P0SKIP
IT01CF
TMR2L
TMR3L
TH0
4(C)
C8051F99x-C8051F98x
SMB0ADM
P1MDOUT
RTC0DAT
ADC0LTL
PMU0CF
CPT0MD
CS0THL
CRC0IN
P1SKIP
TMR2H
TMR3H
CS0SS
CS0DL
ADC0L
FLWR
TH1
5(D)
CRC0AUTO
P2MDOUT
RTC0KEY
CRC0DAT
ADC0LTH
IREF0CN
ADC0MX
CS0THH
PMU0FL
CKCON
CS0DH
ADC0H
CS0SE
FLSCL
EIP1
EIE1
6(E)
PCA0PWM
SFRPAGE
VDM0CN
RSTSRC
P0MASK
P1MASK
CS0MD1
CPT0MX
ADC0CF
P0MAT
P1MAT
PSCTL
FLKEY
PCON
EIP2
EIE2
7(F)
131
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