C8051F996-GM Silicon Laboratories Inc, C8051F996-GM Datasheet - Page 145
![IC MCU 8BIT 8KB FLASH 24QFN](/photos/12/15/121587/c8051f9xx_24-qfn_sml.jpg)
C8051F996-GM
Manufacturer Part Number
C8051F996-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F996-GM
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1943-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F996-GM
Manufacturer:
SILICON
Quantity:
570
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SFR Definition 13.5. EIE2: Extended Interrupt Enable 2
SFR Page = All;SFR Address = 0xE7
Name
Reset
Type
Bit
Bit
7
6
5
4
3
2
1
0
ECSEOS Enable Capacitive Sense End of Scan Interrupt.
ECSCPT Enable Capacitive Sense Conversion Complete Interrupt.
ERTC0F Enable SmaRTClock Oscillator Fail Interrupt.
EWARN Enable Supply Monitor Early Warning Interrupt.
ECSDC
Unused
Unused
Name
EMAT
R/W
7
0
Read = 0b. Write = Don’t care.
0: Disable Capacitive Sense End of Scan interrupt.
1: Enable interrupt requests generated by CS0EOS.
Enable Capacitive Sense Digital Comparator Interrupt.
0: Disable Capacitive Sense Digital Comparator interrupt.
1: Enable interrupt requests generated by CS0CMPF.
0: Disable Capacitive Sense Conversion Complete interrupt.
1: Enable interrupt requests generated by CS0INT.
Read = 0b. Write = Don’t care.
This bit sets the masking of the SmaRTClock Alarm interrupt.
0: Disable SmaRTClock Alarm interrupts.
1: Enable interrupt requests generated by SmaRTClock Alarm.
Enable Port Match Interrupts.
This bit sets the masking of the Port Match Event interrupt.
0: Disable all Port Match interrupts.
1: Enable interrupt requests generated by a Port Match.
This bit sets the masking of the Supply Monitor Early Warning interrupt.
0: Disable the Supply Monitor Early Warning interrupt.
1: Enable interrupt requests generated by the Supply Monitor.
ECSEOS
R/W
6
0
ECSDC
R/W
5
0
ECSCPT
R/W
Rev. 1.0
4
0
C8051F99x-C8051F98x
Function
R
3
0
ERTC0F
R/W
2
0
EMAT
R/W
1
0
EWARN
R/W
0
0
145
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