C8051F996-GM Silicon Laboratories Inc, C8051F996-GM Datasheet - Page 115
![IC MCU 8BIT 8KB FLASH 24QFN](/photos/12/15/121587/c8051f9xx_24-qfn_sml.jpg)
C8051F996-GM
Manufacturer Part Number
C8051F996-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F996-GM
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1943-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F996-GM
Manufacturer:
SILICON
Quantity:
570
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SFR Definition 8.14. CS0PM: Capacitive Sense Pin Monitor
SFR Page = 0xF; SFR Address = 0xDE;
Name
Reset
Bit
1:0
Type
7
6
5
4
3
2
Bit
CSPMMD[1:0] CS0 Pin Monitor Mode.
SMBPM
PCAPM
CP0PM
PIOPM
UAPM
SPIPM
UAPM
Name
R/W
7
0
SPIPM
UART Pin Monitor Enable.
Enables monitoring of the UART TX pin.
SPI Pin Monitor Enable.
Enables monitoring SPI output pins.
SMBus Pin Monitor Enable.
Enables monitoring of the SMBus pins.
PCA Pin Monitor Enable.
Enables monitoring of PCA output pins.
Port I/O Pin Monitor Enable.
Enables monitoring of writes to the port latch registers.
CP0 Pin Monitor Enable.
Enables monitoring of the comparator CP0 output.
Selects the operation to take when a monitored signal changes state.
00: Always retry bit cycles on a pin state change.
01: Retry up to twice on consecutive bit cycles.
10: Retry up to four times on consecutive bit cycles.
11: Reserved.
R/W
6
0
SMBPM
R/W
5
0
PCAPM
R/W
Rev. 1.0
4
0
C8051F99x-C8051F98x
Description
PIOPM
R/W
3
0
CP0PM
R/W
2
0
CSPMMD[1:0]
1
0
R/W
0
0
115
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