PIC16F76-I/ML Microchip Technology, PIC16F76-I/ML Datasheet - Page 658

• Manufacturer Part Number: PIC16F76-I/ML
• Description: IC MCU FLASH 8KX14 A/D 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F76-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16F76-I/MLR; PIC16F76-I/MLR; PIC16F76I/ML

PICmicro MID-RANGE MCU FAMILY
DS31034A-page 34-6
For 10-bit address:
A master transmitter addresses a slave receiver
with a 10-bit address.
S
(Code + A9:A8)
Slave Address
(write)
Figure A-6
sequences.
Figure A-6:
Figure A-7:
A master reads a slave immediately after the first byte.
For 7-bit address:
S
From slave to master
From master to slave
Slave Address
R/W A1 Slave Address
'1' (read)
A master transmitter addresses a slave receiver
with a 10-bit address.
For 10-bit address:
A master transmitter addresses a slave receiver with a
7-bit address. The transfer direction is not changed.
For 7-bit address:
and
S
S
(Code + A9:A8)
Slave Address
Slave Address R/W A Data A Data A/A P
From slave to master
From master to slave
Master-Transmitter Sequence
Master-Receiver Sequence
Figure A-7
(A7:A0)
'0' (write)
R/W A Data A Data
(write)
(n bytes - acknowledge)
show Master-transmitter and Master-receiver data transfer
R/W A1 Slave Address
data transferred
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = Start Condition
P = Stop Condition
A2
Sr
(n bytes - acknowledge)
(Code + A9:A8)
Slave Address
data transferred
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = Start Condition
P = Stop Condition
(A7:A0)
A
(read)
P
A2 Data A
R/W A3
1997 Microchip Technology Inc.
Data A
Data
A/A
Data
P
A
P