PIC16F76-I/ML Microchip Technology, PIC16F76-I/ML Datasheet - Page 563

• Manufacturer Part Number: PIC16F76-I/ML
• Description: IC MCU FLASH 8KX14 A/D 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F76-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16F76-I/MLR; PIC16F76-I/MLR; PIC16F76I/ML

1997 Microchip Technology Inc.
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1
Example 2
Example 3
Q1
Decode
Q2
register 'f'
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of register 'f' are exchanged. If 'd' is 0 the
result is placed in W register. If 'd' is 1 the result is placed in register 'f'.
1
1
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Read
SWAPF
SWAPF
SWAPF
00
f
[0,1]
Section 29. Instruction Set
127
W
FSR = 0xC2
Contents of Address (FSR) = 0x20
W
FSR = 0xC2
Contents of Address (FSR) = 0x02
Swap Nibbles in f
REG, 0
REG, 1
REG1= 0xA5
REG1= 0xA5
W
REG1= 0xA5
REG1= 0x5A
INDF, 1
Q3
1110
destination<7:4>,
destination<3:0>
Process
= 0x17
= 0x17
data
= 0x5A
dfff
Q4
destination
Write to
ffff
DS31029A-page 29-41
29