PIC16F76-I/ML Microchip Technology, PIC16F76-I/ML Datasheet - Page 435

IC MCU FLASH 8KX14 A/D 28QFN

PIC16F76-I/ML

Manufacturer Part Number
PIC16F76-I/ML
Description
IC MCU FLASH 8KX14 A/D 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F76-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16F76-I/MLR
PIC16F76-I/MLR
PIC16F76I/ML
Section 23. 10-bit A/D Converter
23.7.2
A/D Result Registers
The ADRESH:ADRESL register pair is the location where the 10-bit A/D result is loaded at the
completion of the A/D conversion. This register pair is 16-bits wide. The A/D module gives the
flexibility to left or right justify the 10-bit result in the 16-bit result register. The A/D Format Select
bit (ADFM) controls this justification.
Figure 23-6
shows the operation of the A/D result justifica-
tion. The extra bits are loaded with ‘0’s’. When an A/D result will not overwrite these locations (A/D
disable), these registers may be used as two general purpose 8-bit registers.
Figure 23-6: A/D Result Justification
10-Bit Result
ADFM = 0
ADFM = 1
0
7
7
2 1 0 7
0 7 6 5
0
RESULT
RESULT
0000 00
0000 00
ADRESH
ADRESH
ADRESL
ADRESL
10-bits
10-bits
23
Left Justified
Right Justified
Preliminary
1997 Microchip Technology Inc.
DS31023A-page 23-13

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