PIC16F76-I/ML Microchip Technology, PIC16F76-I/ML Datasheet - Page 332

• Manufacturer Part Number: PIC16F76-I/ML
• Description: IC MCU FLASH 8KX14 A/D 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F76-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16F76-I/MLR; PIC16F76-I/MLR; PIC16F76I/ML

PICmicro MID-RANGE MCU FAMILY
17.5
DS31017A-page 17-56
Connection Considerations for I
For standard-mode I
on the following parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices (input current + leakage current)
The supply voltage limits the minimum value of resistor R
current of 3 mA at V
age of V
function of R
limits the maximum value of R
tibility.
The bus capacitance is the total capacitance of wire, connections, and pins. This capacitance lim-
its the maximum value of R
The SMP bit is the slew rate control enabled bit. This bit is in the SSPSTAT register, and controls
the slew rate of the I/O pins when in I
Figure 17-42: Sample Device Configuration for I
NOTE: I
DD
= 5V+10% and V
P
line to which the pull up resistor is also connected.
is shown in Figure 17-42. The desired noise margin of 0.1V
2
C devices with input levels related to V
OLMAX
SDA
SCL
2
C bus devices, the values of resistors R
R
= 0.4V for the specified output stages. For example, with a supply volt-
P
P
2
Preliminary
C Bus
OLMAX
due to the specified rise time
S
. Series resistors are optional, and used to improve ESD suscep-
R
P
= 0.4V at 3 mA, R
2
C mode (master or slave).
R
S
V
DD
DEVICE
R
+ 10%
S
2
C Bus
PMIN
DD
must have one common supply
P
(Figure
= (5.5-0.4)/0.003 = 1.7 k
due to the specified minimum sink
P
and R
17-42).
1997 Microchip Technology Inc.
S
in
Figure 17-42
DD
C
B
for the low level,
= 10 - 400 pF
V
depends
DD
as a