PIC16F76-I/ML Microchip Technology, PIC16F76-I/ML Datasheet - Page 389

• Manufacturer Part Number: PIC16F76-I/ML
• Description: IC MCU FLASH 8KX14 A/D 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F76-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16F76-I/MLR; PIC16F76-I/MLR; PIC16F76I/ML

21.3
1997 Microchip Technology Inc.
Operation
When the A/D conversion is complete, the result is loaded into the ADRES register, the
GO/DONE bit (ADCON0<2>) is cleared, and A/D interrupt flag bit, ADIF, is set.
After the A/D module has been configured as desired, the selected channel must be acquired
before the conversion is started. The analog input channels must have their corresponding TRIS
bits selected as an input. To determine acquisition time, see Subsection
Requirements.”
following steps should be followed for doing an A/D conversion:
1.
2.
3.
4.
5.
6.
7.
Figure 21-2
time that the A/D module’s holding capacitor is connected to the external voltage level. Then
there is the conversion time of 10 T
two times is the sampling time. There is a minimum acquisition time to ensure that the holding
capacitor is charged to a level that will give the desired accuracy for the A/D conversion.
Figure 21-2: A/D Conversion Sequence
Configure the A/D module:
• Configure analog pins / voltage reference / and digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear the ADIF bit
• Set the ADIE bit
• Set the GIE bit
Wait the required acquisition time.
Start conversion:
• Set the GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result register (ADRES), clear the ADIF bit, if required.
For next conversion, go to step 1 or step 2 as required. The A/D conversion time per bit is
defined as T
When A/D holding capacitor start to charge.
After A/D conversion, or new A/D channel is selected.
Acquisition Time
shows the conversion sequence, and the terms that are used. Acquisition time is the
Section 21. 8-bit A/D Converter
AD
After this acquisition time has elapsed the A/D conversion can be started. The
. A minimum wait of 2T
A/D Sample Time
When A/D conversion is started (setting the GO bit).
Holding capacitor is disconnected from the analog input before
the conversion is started.
Conversion Time
AD
, which is started when the GO bit is set. The sum of these
AD
is required before next acquisition starts.
A/D conversion complete,
result is loaded in ADRES register.
Holding capacitor begins acquiring
voltage level on selected channel.
ADIF bit is set.
21.4 “A/D Acquisition
DS31021A-page 21-5
21