PIC16F76-I/ML Microchip Technology, PIC16F76-I/ML Datasheet - Page 53

IC MCU FLASH 8KX14 A/D 28QFN

PIC16F76-I/ML

Manufacturer Part Number
PIC16F76-I/ML
Description
IC MCU FLASH 8KX14 A/D 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F76-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16F76-I/MLR
PIC16F76-I/MLR
PIC16F76I/ML
Figure 3-1: Simplified Block Diagram of a Super-set On-chip Reset Circuit
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin or the INTRC oscillator.
1997 Microchip Technology Inc.
OSC1/
CLKIN
MCLR / V
MCLRE
Enable
V
I/O Pull-up
Pin
DD
2: Features in dashed boxes not available on all devices, see device’s Data Sheet.
3: In some devices, this pin may be configured as a general purpose Input.
4: The early PICmicro devices have the configuration bit defined as PWRTE = 1 is enabled, while all other
On-chip
devices the configuration bit is defined as PWRTE = 0 is enabled.
PP
RC OSC
OST/PWRT
Pin
Brown-out
Program
Memory
V
Module
(3)
(1)
Parity
detect
WDT
DD
Reset
rise
OST
PWRT
V
DD
Weak Pull-up
10-bit Ripple-counter
10-bit Ripple-counter
WDT Time-out
Power-on Reset
MPEEN
BODEN
SLEEP
MCLRE
(2)
(2)
(2)
(2)
Enable PWRT
Enable OST
(4)
See
Section 3. Reset
Table 3-1
for time-out situations.
S
R
DS31003A-page 3-3
Q
Chip_Reset
3

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