PIC18F86J90-I/PT Microchip Technology, PIC18F86J90-I/PT Datasheet - Page 295

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PIC18F86J90-I/PT

Manufacturer Part Number
PIC18F86J90-I/PT
Description
IC PIC MCU FLASH 64KB 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J90-I/PT

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
67
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
67
Number Of Timers
4
Operating Supply Voltage
2.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F86J90-I/PT
0
21.2
The ADCON2 register allows the user to select an
acquisition time that occurs each time the GO/DONE
bit is set.
When the GO/DONE bit is set, sampling is stopped and
a conversion begins. The user is responsible for ensur-
ing the required acquisition time has passed between
selecting the desired input channel and setting the
GO/DONE bit. This occurs when the ACQT<2:0> bits
(ADCON2<5:3>) remain in their Reset state (‘000’) and
is compatible with devices that do not offer
programmable acquisition times.
If desired, the ACQT bits can be set to select a pro-
grammable acquisition time for the A/D module. When
the GO/DONE bit is set, the A/D module continues to
sample the input for the selected acquisition time, then
automatically begins a conversion. Since the acquisi-
tion time is programmed, there may be no need to wait
for an acquisition time between selecting a channel and
setting the GO/DONE bit.
In either case, when the conversion is completed, the
GO/DONE bit is cleared, the ADIF flag is set and the
A/D begins sampling the currently selected channel
again. If an acquisition time is programmed, there is
nothing to indicate if the acquisition time has ended or
if the conversion has begun.
21.3
The A/D conversion time per bit is defined as T
A/D conversion requires 11 T
The source of the A/D conversion clock is software
selectable.
There are seven possible options for T
• 2 T
• 4 T
• 8 T
• 16 T
• 32 T
• 64 T
• Internal RC Oscillator
For correct A/D conversions, the A/D conversion clock
(T
minimum, T
more information).
Table 21-1 shows the resultant T
the device operating frequencies and the A/D clock
source selected.
 2010 Microchip Technology Inc.
AD
) must be as short as possible, but greater than the
OSC
OSC
OSC
OSC
OSC
OSC
Selecting and Configuring
Automatic Acquisition Time
Selecting the A/D Conversion
Clock
AD
(see parameter 130 in Table 28-25 for
AD
per 10-bit conversion.
AD
times derived from
AD
:
AD
. The
PIC18F87J90 FAMILY
TABLE 21-1:
21.4
The ADCON1, TRISA, TRISF and TRISH registers
control the operation of the A/D port pins. The port pins
needed as analog inputs must have their correspond-
ing TRIS bits set (input). If the TRIS bit is cleared
(output), the digital output level (V
converted.
The A/D operation is independent of the state of the
CHS<3:0> bits and the TRIS bits.
Note 1: The RC source has a typical T
Note 1: When reading the PORT register, all pins
Operation
16 T
32 T
64 T
2 T
4 T
8 T
AD Clock Source (T
RC
2: For device frequencies above 1 MHz, the
OSC
OSC
OSC
2: Analog levels on any pin defined as a
Configuring Analog Port Pins
OSC
OSC
OSC
(2)
4 s.
device must be in Sleep mode for the entire
conversion or the A/D accuracy may be out
of specification.
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an
analog input. Analog levels on a digitally
configured
converted.
digital input may cause the digital input
buffer to consume current out of the
device’s specification limits.
T
FREQUENCIES
AD
ADCS<2:0>
vs. DEVICE OPERATING
000
100
001
101
010
110
x11
input
AD
)
will
DS39933D-page 295
OH
be
or V
Frequency
22.86 MHz
11.43 MHz
Maximum
1.00 MHz
2.86 MHz
5.71 MHz
40.0 MHz
40.0 MHz
AD
Device
accurately
OL
time of
) will be
(1)

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