PIC18F86J90-I/PT Microchip Technology, PIC18F86J90-I/PT Datasheet - Page 149

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PIC18F86J90-I/PT

Manufacturer Part Number
PIC18F86J90-I/PT
Description
IC PIC MCU FLASH 64KB 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J90-I/PT

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
67
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
67
Number Of Timers
4
Operating Supply Voltage
2.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F86J90-I/PT
0
13.0
The Timer2 module incorporates the following features:
• 8-bit Timer and Period registers (TMR2 and PR2,
• Readable and writable (both registers)
• Software programmable prescaler
• Software programmable postscaler
• Interrupt on TMR2 to PR2 match
• Optional use as the shift clock for the
The module is controlled through the T2CON register
(Register 13-1) which enables or disables the timer,
and configures the prescaler and postscaler. Timer2
can be shut off by clearing control bit, TMR2ON
(T2CON<2>), to minimize power consumption.
A simplified block diagram of the module is shown in
Figure 13-1.
REGISTER 13-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-3
bit 2
bit 1-0
respectively)
(1:1, 1:4 and 1:16)
(1:1 through 1:16)
MSSP module
U-0
TIMER2 MODULE
Unimplemented: Read as ‘0’
T2OUTPS<3:0>: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
1111 = 1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS<1:0>: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
T2OUTPS3
R/W-0
T2CON: TIMER2 CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
T2OUTPS2
R/W-0
T2OUTPS1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T2OUTPS0
PIC18F87J90 FAMILY
R/W-0
13.1
In normal operation, TMR2 is incremented from 00h on
each clock (F
clock input
divide-by-16 prescale options. These are selected by the
prescaler control bits, T2CKPS<1:0> (T2CON<1:0>).
The value of TMR2 is compared to that of the Period
register, PR2, on each clock cycle. When the two
signal as the timer output. This signal also resets the
value of TMR2 to 00h on the next cycle and drives the
output counter/postscaler (see Section 13.2 “Timer2
Interrupt”).
The TMR2 and PR2 registers are both directly readable
and writable. The TMR2 register is cleared on any
device Reset, while the PR2 register initializes at FFh.
Both the prescaler and postscaler counters are cleared
on the following events:
• a write to the TMR2 register
• a write to the T2CON register
• any device Reset (Power-on Reset, MCLR Reset,
TMR2 is not cleared when T2CON is written.
values match, the comparator generates a match
Watchdog Timer Reset or Brown-out Reset)
Timer2 Operation
TMR2ON
OSC
R/W-0
gives direct
/4). A 4-bit counter/prescaler on the
x = Bit is unknown
T2CKPS1
R/W-0
input, divide-by-4 and
DS39933D-page 149
T2CKPS0
R/W-0
bit 0

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