M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 257

BOARD EVAL FOR MC9S08GB60

M68EVB908GB60E

Manufacturer Part Number
M68EVB908GB60E
Description
BOARD EVAL FOR MC9S08GB60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of M68EVB908GB60E

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S08GB
Data Bus Width
8 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08GB
Kit Contents
GB60 Evaluation Kit
Rohs Compliant
Yes
For Use With/related Products
MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ARMF — Arm Flag
CNT3:CNT2:CNT1:CNT0 — FIFO Valid Count
Freescale Semiconductor
While DBGEN = 1, this status bit is a read-only image of the ARM bit in DBGC. This bit is set by
writing 1 to the ARM control bit in DBGC (while DBGEN = 1) and is automatically cleared at the end
of a debug run. A debug run is completed when the FIFO is full (begin trace) or when a trigger event
is detected (end trace). A debug run can also be ended manually by writing 0 to the ARM or DBGEN
bits in DBGC.
These bits are cleared at the start of a debug run and indicate the number of words of valid data in the
FIFO at the end of a debug run. The value in CNT does not decrement as data is read out of the FIFO.
The external debug host is responsible for keeping track of the count as information is read out of the
FIFO.
1 = Debugger armed.
0 = Debugger not armed.
CNT[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
MC9S08GB/GT Data Sheet, Rev. 2.3
Table 15-3. CNT Status Bits
Valid Words in FIFO
No valid data
1
2
3
4
5
6
7
8
Registers and Control Bits
257

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