M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 105

BOARD EVAL FOR MC9S08GB60

M68EVB908GB60E

Manufacturer Part Number
M68EVB908GB60E
Description
BOARD EVAL FOR MC9S08GB60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of M68EVB908GB60E

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S08GB
Data Bus Width
8 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08GB
Kit Contents
GB60 Evaluation Kit
Rohs Compliant
Yes
For Use With/related Products
MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.3.3
FLL engaged internal (FEI) is entered when any of the following conditions occur:
In FLL engaged internal mode, the reference clock is derived from the internal reference clock
ICGIRCLK, and the FLL loop will attempt to lock the ICGDCLK frequency to the desired value, as
selected by the MFD bits.
7.3.3.1
FEI unlocked is a temporary state that is entered when FEI is entered and the count error (∆n) output from
the subtractor is greater than the maximum n
lock detector to detect the unlock condition.
Freescale Semiconductor
CLKS bits are written to 01
The DCO clock stabilizes (DCOS = 1) while in SCM upon exiting the off state with CLKS = 01
FLL Engaged, Internal Clock (FEI) Mode
FLL Engaged Internal Unlocked
DCOS
COUNTER ENABLE
SUBTRACTOR
CLKST
REFERENCE
DIVIDER (/7)
RANGE
LOCK
MFD
RANGE
Figure 7-6. Detailed Frequency-Locked Loop Block Diagram
OVERFLOW
LOSS OF CLOCK
LOLS
DETECTOR
LOCK AND
LOCS
MC9S08GB/GT Data Sheet, Rev. 2.3
ICGIRCLK
ERCS
DIGITAL
FILTER
CLKST
LOOP
FLT
unlock
COUNTER
PULSE
or less than the minimum n
CONTROLLED
ICGIF
OSCILLATOR
FLL ANALOG
DIGITALLY
INTERRUPT
RESET AND
CIRCUIT
SELECT
CLOCK
CONTROL
CLKS
LOLRE LOCRE
ICGDCLK
ICG2DCLK
1x
2x
FREQUENCY
DIVIDER (R)
REDUCED
unlock
RFD
, as required by the
FREQUENCY-
LOOP (FLL)
LOCKED
Functional Description
ICGOUT
RESET
IRQ
105

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